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authorBoyuan Zhang <boyuan.zhang@amd.com>2017-11-07 15:41:40 -0500
committerLeo Liu <leo.liu@amd.com>2017-11-17 12:25:47 -0500
commit436a3f8d6d52921d91a2dab53fcfca192037125e (patch)
tree57b14f49eae7d63ea94d140dc98121c1569f5588
parentf2021d92eb77ad6fa421e836aa4699526a7c13da (diff)
radeon/common: add vcn enc ip info query
New ip info query is needed for vcn encode Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Acked-by: Christian K├Ânig <christian.koenig@amd.com>
-rw-r--r--src/amd/common/ac_gpu_info.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 6c4630f0444..6e34a070132 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -98,7 +98,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
{
struct amdgpu_buffer_size_alignments alignment_info = {};
struct amdgpu_heap_info vram, vram_vis, gtt;
- struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, vce = {}, vcn_dec = {};
+ struct drm_amdgpu_info_hw_ip dma = {}, compute = {}, uvd = {}, vce = {}, vcn_dec = {}, vcn_enc = {};
uint32_t vce_version = 0, vce_feature = 0, uvd_version = 0, uvd_feature = 0;
int r, i, j;
drmDevicePtr devinfo;
@@ -174,6 +174,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
}
}
+ if (info->drm_major == 3 && info->drm_minor >= 17) {
+ r = amdgpu_query_hw_ip_info(dev, AMDGPU_HW_IP_VCN_ENC, 0, &vcn_enc);
+ if (r) {
+ fprintf(stderr, "amdgpu: amdgpu_query_hw_ip_info(vcn_enc) failed.\n");
+ return false;
+ }
+ }
+
r = amdgpu_query_firmware_version(dev, AMDGPU_INFO_FW_GFX_ME, 0, 0,
&info->me_fw_version,
&info->me_fw_feature);