summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>2021-01-13 21:20:42 +0100
committerDylan Baker <dylan.c.baker@intel.com>2021-01-20 09:22:16 -0800
commit24b733aebd39d0c8df77b0867c0cf468c0d8f3a0 (patch)
treefcb8aae7da8b9af8c91bc267e5319d41b3d589f8
parent3994f5db4834b8241140e93723ad2fe2f1343e1a (diff)
radeonsi: inhibit clockgating when using SQTT
Ported from PAL. Fixes: 07c1504d1b0 ("radeonsi: implement SQTT support") Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8480> (cherry picked from commit 41d22eb68ef76bb9696f629fd6e06e68e55c3921)
-rw-r--r--.pick_status.json2
-rw-r--r--src/gallium/drivers/radeonsi/si_perfcounter.c14
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_sqtt.c4
4 files changed, 13 insertions, 8 deletions
diff --git a/.pick_status.json b/.pick_status.json
index 6f29e35b3a5..6a6ad11a2bc 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -85,7 +85,7 @@
"description": "radeonsi: inhibit clockgating when using SQTT",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": "07c1504d1b08d4f61aeada7364d63e26d05d05f9"
},
diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c
index f28a51ffd52..6363368c5a3 100644
--- a/src/gallium/drivers/radeonsi/si_perfcounter.c
+++ b/src/gallium/drivers/radeonsi/si_perfcounter.c
@@ -919,14 +919,14 @@ static void si_pc_query_destroy(struct si_context *sctx, struct si_query *squery
FREE(query);
}
-static void si_inhibit_clockgating(struct si_context *sctx, bool inhibit)
+void si_inhibit_clockgating(struct si_context *sctx, struct radeon_cmdbuf *cs, bool inhibit)
{
if (sctx->chip_class >= GFX10) {
- radeon_set_uconfig_reg(&sctx->gfx_cs, R_037390_RLC_PERFMON_CLK_CNTL,
- S_037390_PERFMON_CLOCK_STATE(inhibit));
+ radeon_set_uconfig_reg(cs, R_037390_RLC_PERFMON_CLK_CNTL,
+ S_037390_PERFMON_CLOCK_STATE(inhibit));
} else if (sctx->chip_class >= GFX8) {
- radeon_set_uconfig_reg(&sctx->gfx_cs, R_0372FC_RLC_PERFMON_CLK_CNTL,
- S_0372FC_PERFMON_CLOCK_STATE(inhibit));
+ radeon_set_uconfig_reg(cs, R_0372FC_RLC_PERFMON_CLK_CNTL,
+ S_0372FC_PERFMON_CLOCK_STATE(inhibit));
}
}
@@ -946,7 +946,7 @@ static void si_pc_query_resume(struct si_context *sctx, struct si_query *squery)
if (query->shaders)
si_pc_emit_shaders(sctx, query->shaders);
- si_inhibit_clockgating(sctx, true);
+ si_inhibit_clockgating(sctx, &sctx->gfx_cs, true);
for (struct si_query_group *group = query->groups; group; group = group->next) {
struct si_pc_block *block = group->block;
@@ -1000,7 +1000,7 @@ static void si_pc_query_suspend(struct si_context *sctx, struct si_query *squery
si_pc_emit_instance(sctx, -1, -1);
- si_inhibit_clockgating(sctx, false);
+ si_inhibit_clockgating(sctx, &sctx->gfx_cs, false);
}
static bool si_pc_query_begin(struct si_context *ctx, struct si_query *squery)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 339021a792d..1826bd99603 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1491,6 +1491,7 @@ void si_init_compiler(struct si_screen *sscreen, struct ac_llvm_compiler *compil
/* si_perfcounters.c */
void si_init_perfcounters(struct si_screen *screen);
void si_destroy_perfcounters(struct si_screen *screen);
+void si_inhibit_clockgating(struct si_context *sctx, struct radeon_cmdbuf *cs, bool inhibit);
/* si_query.c */
void si_init_screen_query_functions(struct si_screen *sscreen);
diff --git a/src/gallium/drivers/radeonsi/si_sqtt.c b/src/gallium/drivers/radeonsi/si_sqtt.c
index 9bd1483ae31..1366430cff8 100644
--- a/src/gallium/drivers/radeonsi/si_sqtt.c
+++ b/src/gallium/drivers/radeonsi/si_sqtt.c
@@ -378,6 +378,8 @@ si_thread_trace_start(struct si_context *sctx, int family, struct radeon_cmdbuf
SI_CONTEXT_INV_L2;
sctx->emit_cache_flush(sctx, cs);
+ si_inhibit_clockgating(sctx, cs, true);
+
/* Enable SQG events that collects thread trace data. */
si_emit_spi_config_cntl(sctx, cs, true);
@@ -418,6 +420,8 @@ si_thread_trace_stop(struct si_context *sctx, int family, struct radeon_cmdbuf *
/* Restore previous state by disabling SQG events. */
si_emit_spi_config_cntl(sctx, cs, false);
+
+ si_inhibit_clockgating(sctx, cs, false);
}