summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChristian Gmeiner <christian.gmeiner@gmail.com>2021-01-02 08:51:29 +0100
committerMarge Bot <eric+marge@anholt.net>2021-01-06 14:34:41 +0000
commit241fb754855f89e7df0da0f3bab55c95427e2821 (patch)
tree7ca77f5f994ddc0f4c6108a33a7dc225bba6a8c8
parent3d9c5d8a7d2961887f78ecbfb4b6b84bbad80ff8 (diff)
vc4: use intrinsic builders
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8295>
-rw-r--r--src/gallium/drivers/vc4/vc4_blit.c18
-rw-r--r--src/gallium/drivers/vc4/vc4_nir_lower_blend.c21
-rw-r--r--src/gallium/drivers/vc4/vc4_nir_lower_io.c17
3 files changed, 15 insertions, 41 deletions
diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c
index 086a75d0565..9fb50d87f2a 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -291,19 +291,15 @@ static void *vc4_get_yuv_fs(struct pipe_context *pctx, int cpp)
y_offset = nir_imul(&b, y, stride);
}
- nir_intrinsic_instr *load =
- nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_ubo);
- load->num_components = 1;
- nir_ssa_dest_init(&load->instr, &load->dest, load->num_components, 32, NULL);
- load->src[0] = nir_src_for_ssa(one);
- load->src[1] = nir_src_for_ssa(nir_iadd(&b, x_offset, y_offset));
- nir_intrinsic_set_align(load, 4, 0);
- nir_intrinsic_set_range_base(load, 0);
- nir_intrinsic_set_range(load, ~0);
- nir_builder_instr_insert(&b, &load->instr);
+ nir_ssa_def *load =
+ nir_load_ubo(&b, 1, 32, one, nir_iadd(&b, x_offset, y_offset),
+ .align_mul = 4,
+ .align_offset = 0,
+ .range_base = 0,
+ .range = ~0);
nir_store_var(&b, color_out,
- nir_unpack_unorm_4x8(&b, &load->dest.ssa),
+ nir_unpack_unorm_4x8(&b, load),
0xf);
struct pipe_shader_state shader_tmpl = {
diff --git a/src/gallium/drivers/vc4/vc4_nir_lower_blend.c b/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
index dcd0a12373c..a63190144f0 100644
--- a/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
+++ b/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
@@ -57,15 +57,8 @@ blend_depends_on_dst_color(struct vc4_compile *c)
static nir_ssa_def *
vc4_nir_get_dst_color(nir_builder *b, int sample)
{
- nir_intrinsic_instr *load =
- nir_intrinsic_instr_create(b->shader,
- nir_intrinsic_load_input);
- load->num_components = 1;
- nir_intrinsic_set_base(load, VC4_NIR_TLB_COLOR_READ_INPUT + sample);
- load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL);
- nir_builder_instr_insert(b, &load->instr);
- return &load->dest.ssa;
+ return nir_load_input(b, 1, 32, nir_imm_int(b, 0),
+ .base = VC4_NIR_TLB_COLOR_READ_INPUT + sample);
}
static nir_ssa_def *
@@ -522,14 +515,8 @@ vc4_nir_store_sample_mask(struct vc4_compile *c, nir_builder *b,
sample_mask->data.driver_location = c->s->num_outputs++;
sample_mask->data.location = FRAG_RESULT_SAMPLE_MASK;
- nir_intrinsic_instr *intr =
- nir_intrinsic_instr_create(c->s, nir_intrinsic_store_output);
- intr->num_components = 1;
- nir_intrinsic_set_base(intr, sample_mask->data.driver_location);
-
- intr->src[0] = nir_src_for_ssa(val);
- intr->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_builder_instr_insert(b, &intr->instr);
+ nir_store_output(b, val, nir_imm_int(b, 0),
+ .base = sample_mask->data.driver_location);
}
static void
diff --git a/src/gallium/drivers/vc4/vc4_nir_lower_io.c b/src/gallium/drivers/vc4/vc4_nir_lower_io.c
index 119ccf276d5..b072c409165 100644
--- a/src/gallium/drivers/vc4/vc4_nir_lower_io.c
+++ b/src/gallium/drivers/vc4/vc4_nir_lower_io.c
@@ -188,19 +188,10 @@ vc4_nir_lower_vertex_attr(struct vc4_compile *c, nir_builder *b,
* shader by ntq_setup_inputs().
*/
nir_ssa_def *vpm_reads[4];
- for (int i = 0; i < align(attr_size, 4) / 4; i++) {
- nir_intrinsic_instr *intr_comp =
- nir_intrinsic_instr_create(c->s,
- nir_intrinsic_load_input);
- intr_comp->num_components = 1;
- nir_intrinsic_set_base(intr_comp, nir_intrinsic_base(intr));
- nir_intrinsic_set_component(intr_comp, i);
- intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
- nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
- nir_builder_instr_insert(b, &intr_comp->instr);
-
- vpm_reads[i] = &intr_comp->dest.ssa;
- }
+ for (int i = 0; i < align(attr_size, 4) / 4; i++)
+ vpm_reads[i] = nir_load_input(b, 1, 32, nir_imm_int(b, 0),
+ .base = nir_intrinsic_base(intr),
+ .component = i);
bool format_warned = false;
const struct util_format_description *desc =