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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2016-12-16 14:22:16 +0100
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>2017-01-12 15:21:47 +0100
commit1b3b4196f08bf825d031cdf6bfcbc7dd3ccf3172 (patch)
tree3bf1fd7eec9a3223384898b194239a9ca24e01c0
parent75968a668e44b3fd7c9b9277937c005366fca116 (diff)
nv50/ir: do not insert texture barriers on gm107
It's actually useless to insert those texture barriers post RA because the current control code (ie. st 0x0) will wait for all dependencies before issuing a new instruction. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Pierre Moreau <pierre.morrow@free.fr>
-rw-r--r--src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index fe18f4718de..ff253af6997 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -190,7 +190,8 @@ NVC0LegalizePostRA::NVC0LegalizePostRA(const Program *prog)
: rZero(NULL),
carry(NULL),
pOne(NULL),
- needTexBar(prog->getTarget()->getChipset() >= 0xe0)
+ needTexBar(prog->getTarget()->getChipset() >= 0xe0 &&
+ prog->getTarget()->getChipset() < 0x110)
{
}