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authorYogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>2021-01-27 15:37:03 +0530
committerMarge Bot <eric+marge@anholt.net>2021-02-19 14:29:47 +0000
commit12515d6b59f29cbc6475c76539a5766580afea8e (patch)
tree529f0e46148972d01f1b04e3d604f3f191d2013b
parent27ff46bde66bc8a7f6f3c5d4844c946fe8c4a04b (diff)
ac/rgp: add rgp co, col, pso data structures
This patch adds data structures used to collect data for code object, code object loader event and pso correlation databases present in a rgp profile. v2: fix code review comments from Pierre-Eric v3: Make loader_event_type into enum Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8609>
-rw-r--r--src/amd/common/ac_rgp.h74
1 files changed, 74 insertions, 0 deletions
diff --git a/src/amd/common/ac_rgp.h b/src/amd/common/ac_rgp.h
index caef1e19ba9..f0a9be6f44c 100644
--- a/src/amd/common/ac_rgp.h
+++ b/src/amd/common/ac_rgp.h
@@ -27,10 +27,84 @@
#define AC_RGP_H
#include <stdint.h>
+#include "compiler/shader_enums.h"
+#include "list.h"
+#include "util/simple_mtx.h"
struct radeon_info;
struct ac_thread_trace;
+enum rgp_hardware_stages {
+ RGP_HW_STAGE_VS = 0,
+ RGP_HW_STAGE_LS,
+ RGP_HW_STAGE_HS,
+ RGP_HW_STAGE_ES,
+ RGP_HW_STAGE_GS,
+ RGP_HW_STAGE_PS,
+ RGP_HW_STAGE_CS,
+ RGP_HW_STAGE_MAX,
+};
+
+struct rgp_shader_data {
+ uint64_t hash[2];
+ uint32_t code_size;
+ uint8_t *code;
+ uint32_t vgpr_count;
+ uint32_t sgpr_count;
+ uint64_t base_address;
+ uint32_t elf_symbol_offset;
+ uint32_t hw_stage;
+ uint32_t is_combined;
+};
+
+struct rgp_code_object_record {
+ uint32_t shader_stages_mask;
+ struct rgp_shader_data shader_data[MESA_SHADER_STAGES];
+ uint32_t num_shaders_combined; /* count combined shaders as one count */
+ uint64_t pipeline_hash[2];
+ struct list_head list;
+};
+
+struct rgp_code_object {
+ uint32_t record_count;
+ struct list_head record;
+ simple_mtx_t lock;
+};
+
+enum rgp_loader_event_type
+{
+ RGP_LOAD_TO_GPU_MEMORY = 0,
+ RGP_UNLOAD_FROM_GPU_MEMORY,
+};
+
+struct rgp_loader_events_record {
+ uint32_t loader_event_type;
+ uint32_t reserved;
+ uint64_t base_address;
+ uint64_t code_object_hash[2];
+ uint64_t time_stamp;
+ struct list_head list;
+};
+
+struct rgp_loader_events {
+ uint32_t record_count;
+ struct list_head record;
+ simple_mtx_t lock;
+};
+
+struct rgp_pso_correlation_record {
+ uint64_t api_pso_hash;
+ uint64_t pipeline_hash[2];
+ char api_level_obj_name[64];
+ struct list_head list;
+};
+
+struct rgp_pso_correlation {
+ uint32_t record_count;
+ struct list_head record;
+ simple_mtx_t lock;
+};
+
int
ac_dump_thread_trace(struct radeon_info *info,
const struct ac_thread_trace *thread_trace);