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authorTimothy Arceri <tarceri@itsqueeze.com>2019-02-18 15:40:49 +1100
committerTimothy Arceri <tarceri@itsqueeze.com>2019-03-11 16:16:04 +1100
commit051b4064da5e28c13f691385c48d1d86e525774c (patch)
tree6098f9e02069d95a43286e3baa2a0fd4eee9a071
parentf36794d1f0c7f3638f34ff6face8840938a445d0 (diff)
anv: add support for dumping shader info via VK_EXT_debug_report
This information will be used by the vkpipeline-db tool. Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
-rw-r--r--src/intel/vulkan/anv_device.c23
-rw-r--r--src/intel/vulkan/anv_pipeline.c28
2 files changed, 39 insertions, 12 deletions
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 963f108a0e8..729cceb3e32 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -44,9 +44,30 @@
#include "genxml/gen7_pack.h"
+/* This is probably far to big but it reflects the max size used for messages
+ * in OpenGLs KHR_debug.
+ */
+#define MAX_DEBUG_MESSAGE_LENGTH 4096
+
static void
compiler_debug_log(void *data, const char *fmt, ...)
-{ }
+{
+ char str[MAX_DEBUG_MESSAGE_LENGTH];
+ struct anv_device *device = (struct anv_device *)data;
+
+ if (list_empty(&device->instance->debug_report_callbacks.callbacks))
+ return;
+
+ va_list args;
+ va_start(args, fmt);
+ (void) vsnprintf(str, MAX_DEBUG_MESSAGE_LENGTH, fmt, args);
+ va_end(args);
+
+ vk_debug_report(&device->instance->debug_report_callbacks,
+ VK_DEBUG_REPORT_DEBUG_BIT_EXT,
+ VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT,
+ 0, 0, 0, "anv", str);
+}
static void
compiler_perf_log(void *data, const char *fmt, ...)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 61edf93cd08..bb9c70a0718 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -625,6 +625,7 @@ anv_pipeline_link_vs(const struct brw_compiler *compiler,
static const unsigned *
anv_pipeline_compile_vs(const struct brw_compiler *compiler,
void *mem_ctx,
+ struct anv_device *device,
struct anv_pipeline_stage *vs_stage)
{
brw_compute_vue_map(compiler->devinfo,
@@ -632,7 +633,7 @@ anv_pipeline_compile_vs(const struct brw_compiler *compiler,
vs_stage->nir->info.outputs_written,
vs_stage->nir->info.separate_shader);
- return brw_compile_vs(compiler, NULL, mem_ctx, &vs_stage->key.vs,
+ return brw_compile_vs(compiler, device, mem_ctx, &vs_stage->key.vs,
&vs_stage->prog_data.vs, vs_stage->nir, -1, NULL);
}
@@ -706,6 +707,7 @@ anv_pipeline_link_tcs(const struct brw_compiler *compiler,
static const unsigned *
anv_pipeline_compile_tcs(const struct brw_compiler *compiler,
void *mem_ctx,
+ struct anv_device *device,
struct anv_pipeline_stage *tcs_stage,
struct anv_pipeline_stage *prev_stage)
{
@@ -714,7 +716,7 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler,
tcs_stage->key.tcs.patch_outputs_written =
tcs_stage->nir->info.patch_outputs_written;
- return brw_compile_tcs(compiler, NULL, mem_ctx, &tcs_stage->key.tcs,
+ return brw_compile_tcs(compiler, device, mem_ctx, &tcs_stage->key.tcs,
&tcs_stage->prog_data.tcs, tcs_stage->nir,
-1, NULL);
}
@@ -731,6 +733,7 @@ anv_pipeline_link_tes(const struct brw_compiler *compiler,
static const unsigned *
anv_pipeline_compile_tes(const struct brw_compiler *compiler,
void *mem_ctx,
+ struct anv_device *device,
struct anv_pipeline_stage *tes_stage,
struct anv_pipeline_stage *tcs_stage)
{
@@ -739,7 +742,7 @@ anv_pipeline_compile_tes(const struct brw_compiler *compiler,
tes_stage->key.tes.patch_inputs_read =
tcs_stage->nir->info.patch_outputs_written;
- return brw_compile_tes(compiler, NULL, mem_ctx, &tes_stage->key.tes,
+ return brw_compile_tes(compiler, device, mem_ctx, &tes_stage->key.tes,
&tcs_stage->prog_data.tcs.base.vue_map,
&tes_stage->prog_data.tes, tes_stage->nir,
NULL, -1, NULL);
@@ -757,6 +760,7 @@ anv_pipeline_link_gs(const struct brw_compiler *compiler,
static const unsigned *
anv_pipeline_compile_gs(const struct brw_compiler *compiler,
void *mem_ctx,
+ struct anv_device *device,
struct anv_pipeline_stage *gs_stage,
struct anv_pipeline_stage *prev_stage)
{
@@ -765,7 +769,7 @@ anv_pipeline_compile_gs(const struct brw_compiler *compiler,
gs_stage->nir->info.outputs_written,
gs_stage->nir->info.separate_shader);
- return brw_compile_gs(compiler, NULL, mem_ctx, &gs_stage->key.gs,
+ return brw_compile_gs(compiler, device, mem_ctx, &gs_stage->key.gs,
&gs_stage->prog_data.gs, gs_stage->nir,
NULL, -1, NULL);
}
@@ -865,6 +869,7 @@ anv_pipeline_link_fs(const struct brw_compiler *compiler,
static const unsigned *
anv_pipeline_compile_fs(const struct brw_compiler *compiler,
void *mem_ctx,
+ struct anv_device *device,
struct anv_pipeline_stage *fs_stage,
struct anv_pipeline_stage *prev_stage)
{
@@ -876,7 +881,7 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler,
prev_stage->prog_data.vue.vue_map.slots_valid;
const unsigned *code =
- brw_compile_fs(compiler, NULL, mem_ctx, &fs_stage->key.wm,
+ brw_compile_fs(compiler, device, mem_ctx, &fs_stage->key.wm,
&fs_stage->prog_data.wm, fs_stage->nir,
NULL, -1, -1, -1, true, false, NULL, NULL);
@@ -1080,22 +1085,23 @@ anv_pipeline_compile_graphics(struct anv_pipeline *pipeline,
const unsigned *code;
switch (s) {
case MESA_SHADER_VERTEX:
- code = anv_pipeline_compile_vs(compiler, stage_ctx, &stages[s]);
+ code = anv_pipeline_compile_vs(compiler, stage_ctx, pipeline->device,
+ &stages[s]);
break;
case MESA_SHADER_TESS_CTRL:
- code = anv_pipeline_compile_tcs(compiler, stage_ctx,
+ code = anv_pipeline_compile_tcs(compiler, stage_ctx, pipeline->device,
&stages[s], prev_stage);
break;
case MESA_SHADER_TESS_EVAL:
- code = anv_pipeline_compile_tes(compiler, stage_ctx,
+ code = anv_pipeline_compile_tes(compiler, stage_ctx, pipeline->device,
&stages[s], prev_stage);
break;
case MESA_SHADER_GEOMETRY:
- code = anv_pipeline_compile_gs(compiler, stage_ctx,
+ code = anv_pipeline_compile_gs(compiler, stage_ctx, pipeline->device,
&stages[s], prev_stage);
break;
case MESA_SHADER_FRAGMENT:
- code = anv_pipeline_compile_fs(compiler, stage_ctx,
+ code = anv_pipeline_compile_fs(compiler, stage_ctx, pipeline->device,
&stages[s], prev_stage);
break;
default:
@@ -1219,7 +1225,7 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
&stage.prog_data.cs);
const unsigned *shader_code =
- brw_compile_cs(compiler, NULL, mem_ctx, &stage.key.cs,
+ brw_compile_cs(compiler, pipeline->device, mem_ctx, &stage.key.cs,
&stage.prog_data.cs, stage.nir, -1, NULL);
if (shader_code == NULL) {
ralloc_free(mem_ctx);