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| author | Chad Versace <chad.versace@intel.com> | 2015-10-08 11:53:08 -0700 |
|---|---|---|
| committer | Chad Versace <chad.versace@intel.com> | 2015-10-09 14:24:12 -0700 |
| commit | dcd59a9e322edeea74187bcad65a8e56c0bfaaa2 (patch) | |
| tree | ea840673c5dcdae6df961cb6f21b972dcca6a1ed | |
| parent | 4c4ba5a8c32c0a58b5874bdb4b42cb12e6b1c2f5 (diff) | |
i965/gen9: Disable MCS for 1x color surfaces
Fast color clears are disabled for gen9 (see the checks in
brw_meta_fast_clear), so there is no reason to allocate the MCS and
track its clear/resolve state.
Reviewed-by: Neil Roberts <neil@linux.intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index a169c41790e..b6e35205727 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -201,6 +201,14 @@ intel_miptree_supports_non_msrt_fast_clear(struct brw_context *brw, if (brw->gen < 7) return false; + if (brw->gen >= 9) { + /* FINISHME: Enable singlesample fast MCS clears on SKL after all GPU + * FINISHME: hangs are resolved. + */ + perf_debug("singlesample fast MCS clears disabled on gen9"); + return false; + } + if (mt->disable_aux_buffers) return false; |