diff options
author | Daniel Schürmann <daniel@schuermann.dev> | 2022-03-15 13:06:48 +0100 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2022-04-13 21:52:43 +0000 |
commit | 415a3820fc1899fed11d5743514821f0adb3eec1 (patch) | |
tree | b4c2d2bffad86ca5057afa90d552c2823e77a3ea | |
parent | 6ebc61d71b853443e7f9f509352656a961b0841a (diff) |
aco/ra: omit VCC affinity on VOPC_SDWA for GFX9+
VOPC_SDWA can also use arbitrary SGPR pairs on GFX9+.
Totals from 5607 (4.16% of 134913) affected shaders: (GFX10.3)
CodeSize: 42470760 -> 42452988 (-0.04%)
Instrs: 7943174 -> 7942883 (-0.00%)
Latency: 102887029 -> 102886305 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 20454456 -> 20454338 (-0.00%); split: -0.00%, +0.00%
Copies: 376818 -> 376865 (+0.01%); split: -0.00%, +0.01%
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15408>
-rw-r--r-- | src/amd/compiler/aco_register_allocation.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 314955061ff..9560aed7742 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -2394,7 +2394,8 @@ get_affinities(ra_ctx& ctx, std::vector<IDSet>& live_out_per_block) instr->operands[0].isFirstKillBeforeDef()) { ctx.split_vectors[instr->operands[0].tempId()] = instr.get(); } else if (instr->isVOPC() && !instr->isVOP3()) { - ctx.assignments[instr->definitions[0].tempId()].vcc = true; + if (!instr->isSDWA() || ctx.program->chip_class == GFX8) + ctx.assignments[instr->definitions[0].tempId()].vcc = true; } else if (instr->isVOP2() && !instr->isVOP3()) { if (instr->operands.size() == 3 && instr->operands[2].isTemp() && instr->operands[2].regClass().type() == RegType::sgpr) |