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authorRyan Neph <ryanneph@google.com>2020-12-16 01:18:09 +0000
committerDylan Baker <dylan.c.baker@intel.com>2020-12-29 21:06:56 -0800
commitf892a46cc5481edc14c2e4bf3f18e20f74545123 (patch)
treee81cb8b48cc79d6af17c753fccc9776e0cd5151e
parentb62bd28ec86a87e02153a1a905c5731f5b00de74 (diff)
virgl: fix BGRA emulation artifacts during window resize
On some devices, window resizing results in flashes of blue- and orange-tinted versions of the current frame until resizing is finished. This fix ensures that the emubgra tweak used for GLES virgl hosts has its enabled state flag set properly during resize events. v2: removed unrelated whitespace change Fixes: 6f68cacf619 ("virgl: Always enable emulated BGRA and swizzling unless specifically told not to") Signed-off-by: Ryan Neph <ryanneph@google.com> Reviewed-by: Gert Wollny <gert.wollny@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8119> (cherry picked from commit accc2222174a90fd24ee56ce751feb6022ecc0c7)
-rw-r--r--.pick_status.json2
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c4
2 files changed, 4 insertions, 2 deletions
diff --git a/.pick_status.json b/.pick_status.json
index 16f9282388b..6f742b17016 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -112,7 +112,7 @@
"description": "virgl: fix BGRA emulation artifacts during window resize",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": "6f68cacf619f7f13bc870355709224c1f3e9bbd8"
},
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 92944f4c06f..5416dc8bd10 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -873,7 +873,9 @@ virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *c
fixup_formats(&screen->caps.caps, &screen->caps.caps.v2.scanout);
union virgl_caps *caps = &screen->caps.caps;
- screen->tweak_gles_emulate_bgra &= !virgl_format_check_bitmask(PIPE_FORMAT_B8G8R8A8_SRGB, caps->v1.render.bitmask, false);
+ bool may_emulate_bgra = (caps->v2.capability_bits & VIRGL_CAP_APP_TWEAK_SUPPORT);
+ screen->tweak_gles_emulate_bgra &= !virgl_format_check_bitmask(
+ PIPE_FORMAT_B8G8R8A8_SRGB, caps->v1.render.bitmask, may_emulate_bgra);
screen->refcnt = 1;
slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);