diff options
| author | Lionel Landwerlin <lionel.g.landwerlin@intel.com> | 2020-02-20 16:16:33 +0200 |
|---|---|---|
| committer | Eric Engestrom <eric@engestrom.ch> | 2020-03-20 00:21:50 +0100 |
| commit | b1cbf7d9faba958dd9fe07f70e23b39210bb3b73 (patch) | |
| tree | 1560e7a5352e6fefa21acc72fbac2cfee6d824e1 | |
| parent | 18e76206b08eb62ba5e914b6cd44ef3237b0268a (diff) | |
isl: only apply main surface ccs pitch constraint with CCS
We could be creating a Y-tiled surface that isn't going to use CCS
(this could be the case when clearly indicated through modifiers).
Don't apply the main surface pitch alignment constraint in that case.
v2: Use logical NOT (Sagar)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a3f6db2c4e92 ("isl: drop CCS row pitch requirement for linear surfaces")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4243>
(cherry picked from commit def3470e9bc1c3c4d93b21cf15b7105e4f553dab)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/intel/isl/isl.c | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/.pick_status.json b/.pick_status.json index 92e8960ae7b..38519e7bf31 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -76,7 +76,7 @@ "description": "isl: only apply main surface ccs pitch constraint with CCS", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": "a3f6db2c4e927be7e7d40cbc39c8664030d2af59" }, diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 5fc94f4b089..040d3f38906 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1371,7 +1371,8 @@ isl_calc_row_pitch_alignment(const struct isl_device *dev, */ if (ISL_DEV_GEN(dev) >= 12 && isl_format_supports_ccs_e(dev->info, surf_info->format) && - tile_info->tiling != ISL_TILING_X) { + tile_info->tiling != ISL_TILING_X && + !(surf_info->usage & ISL_SURF_USAGE_DISABLE_AUX_BIT)) { return isl_align(tile_info->phys_extent_B.width, 512); } |