diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2020-01-15 00:31:49 -0800 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2020-01-28 08:54:24 -0800 |
| commit | 5a79184ee73bba10a633eb6b406c0dec1afe3f20 (patch) | |
| tree | 603a4437bf530cb2760acbd828681a1917cdab0f | |
| parent | dd9467247bf64b60c0dd9cc2787c9f8898d270b5 (diff) | |
intel/compiler: Fix illegal mutation in get_nir_image_intrinsic_image
get_nir_image_intrinsic_image() was incorrectly mutating the value held
by the register which holds the intrinsic's first source (image index).
If this happened to be the register for an SSA def which is also used
elsewhere in the program, this meant that we would clobber that value
in subsequent uses.
Note that this only affects i965, because neither anv nor iris use the
binding table start sections, so nothing is ever added here.
Fixes KHR-GL46.compute_shader.resources-max on i965 with Eric Anholt's
MR !3240 applied. That MR reorders SSBOs and ABOs, so that test uses
image 0 and SSBO 0, causing this code to brilliantly add binding table
index 45 to both the image (correct) and the SSBO (bzzt, wrong!).
Fixes: 09f1de97a76 ("anv,i965: Lower away image derefs in the driver")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3404>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3404>
(cherry picked from commit 0a1c47074b9edbb52c4783b34397d24fe98ad96f)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 9 |
2 files changed, 7 insertions, 4 deletions
diff --git a/.pick_status.json b/.pick_status.json index 4c1a9de1d08..7158345a1da 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3424,7 +3424,7 @@ "description": "intel/compiler: Fix illegal mutation in get_nir_image_intrinsic_image", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": "09f1de97a76a4990fd7ce909760f3c8933263b05" }, diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 291fca33e31..2d6b248d5fe 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3975,17 +3975,20 @@ fs_visitor::get_nir_image_intrinsic_image(const brw::fs_builder &bld, nir_intrinsic_instr *instr) { fs_reg image = retype(get_nir_src_imm(instr->src[0]), BRW_REGISTER_TYPE_UD); + fs_reg surf_index = image; if (stage_prog_data->binding_table.image_start > 0) { if (image.file == BRW_IMMEDIATE_VALUE) { - image.d += stage_prog_data->binding_table.image_start; + surf_index = + brw_imm_ud(image.d + stage_prog_data->binding_table.image_start); } else { - bld.ADD(image, image, + surf_index = vgrf(glsl_type::uint_type); + bld.ADD(surf_index, image, brw_imm_d(stage_prog_data->binding_table.image_start)); } } - return bld.emit_uniformize(image); + return bld.emit_uniformize(surf_index); } fs_reg |