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authorJordan Justen <jordan.l.justen@intel.com>2019-05-25 01:33:17 -0700
committerDylan Baker <dylan@pnwbakers.com>2019-12-03 10:46:25 -0800
commitf6ac7d9a5b899b6e168c102a973a55f68228919f (patch)
tree2240c0a54cad67fb8179244b03c24b215e1913e5
parentf9e8f6bad81a235fd93fe537e94f745ae679a629 (diff)
iris: Allow max dynamic pool size of 2GB for gen12
Reworks: * Adjust comment to list the state packets that curro found to be affected. Fixes: 8125d7960b6 ("intel/dev: Add preliminary device info for Tigerlake") Cc: 19.3 <mesa-stable@lists.freedesktop.org> Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Francisco Jerez <currojerez@riseup.net> (cherry picked from commit e277009d8dbdc9aec4be26aed5357ec41f359937)
-rw-r--r--src/gallium/drivers/iris/iris_bufmgr.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_bufmgr.c b/src/gallium/drivers/iris/iris_bufmgr.c
index 21c0d517861..1c640e1f985 100644
--- a/src/gallium/drivers/iris/iris_bufmgr.c
+++ b/src/gallium/drivers/iris/iris_bufmgr.c
@@ -1660,6 +1660,7 @@ iris_bufmgr_init(struct gen_device_info *devinfo, int fd, bool bo_reuse)
STATIC_ASSERT(IRIS_MEMZONE_SHADER_START == 0ull);
const uint64_t _4GB = 1ull << 32;
+ const uint64_t _2GB = 1ul << 31;
/* The STATE_BASE_ADDRESS size field can only hold 1 page shy of 4GB */
const uint64_t _4GB_minus_1 = _4GB - PAGE_SIZE;
@@ -1669,9 +1670,16 @@ iris_bufmgr_init(struct gen_device_info *devinfo, int fd, bool bo_reuse)
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_SURFACE],
IRIS_MEMZONE_SURFACE_START,
_4GB_minus_1 - IRIS_MAX_BINDERS * IRIS_BINDER_SIZE);
+ /* TODO: Why does limiting to 2GB help some state items on gen12?
+ * - CC Viewport Pointer
+ * - Blend State Pointer
+ * - Color Calc State Pointer
+ */
+ const uint64_t dynamic_pool_size =
+ (devinfo->gen >= 12 ? _2GB : _4GB_minus_1) - IRIS_BORDER_COLOR_POOL_SIZE;
util_vma_heap_init(&bufmgr->vma_allocator[IRIS_MEMZONE_DYNAMIC],
IRIS_MEMZONE_DYNAMIC_START + IRIS_BORDER_COLOR_POOL_SIZE,
- _4GB_minus_1 - IRIS_BORDER_COLOR_POOL_SIZE);
+ dynamic_pool_size);
/* Leave the last 4GB out of the high vma range, so that no state
* base address + size can overflow 48 bits.