diff options
| author | Andrii Simiklit <andrii.simiklit@globallogic.com> | 2019-01-25 15:03:07 +0200 |
|---|---|---|
| committer | Dylan Baker <dylan@pnwbakers.com> | 2019-02-25 09:13:48 -0800 |
| commit | 4cfdd5a1f2e42f19a7a94c386ae6f048a84fcf78 (patch) | |
| tree | 9cfaaa5e0f47649bf4402364231b481212878d40 | |
| parent | 6abb6bd87aac3e230ab6f8aab8d73936a811dcb4 (diff) | |
i965: re-emit index buffer state on a reset option change.
Seems like we forget to update the index buffer (ib) status and
IndexedDrawCutIndexEnable or CutIndexEnable flag is left unchanged it
leads to ignoring of glEnable/glDisable functions for GL_PRIMITIVE_RESTART
in some cases. The index buffer (ib) status should be re-emmited after the
reset option change to avoid some unexpected behavior.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109451
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Signed-off-by: Andrii Simiklit <asimiklit.work@gmail.com>
(cherry picked from commit f4f4ec941e1427142656e588244f378e469e996e)
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.h | 3 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw_upload.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/genX_state_upload.c | 3 |
3 files changed, 13 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 66fe5b3a8a0..ea961351f6f 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -1006,6 +1006,9 @@ struct brw_context /* High bits of the last seen index buffer address (for workarounds). */ uint16_t last_bo_high_bits; + + /* Used to understand is GPU state of primitive restart is up to date */ + bool enable_cut_index; } ib; /* Active vertex program: diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index dfbc45fe938..2f52899fcb0 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -776,6 +776,14 @@ brw_upload_indices(struct brw_context *brw) brw->ib.index_size = index_buffer->index_size; brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER; } + + /* We need to re-emit an index buffer state each time + * when cut index flag is changed + */ + if (brw->prim_restart.enable_cut_index != brw->ib.enable_cut_index) { + brw->ib.enable_cut_index = brw->prim_restart.enable_cut_index; + brw->ctx.NewDriverState |= BRW_NEW_INDEX_BUFFER; + } } const struct brw_tracked_state brw_indices = { diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index dcdfb3c9292..027dad1e089 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -998,7 +998,8 @@ genX(emit_index_buffer)(struct brw_context *brw) brw_batch_emit(brw, GENX(3DSTATE_INDEX_BUFFER), ib) { #if GEN_GEN < 8 && !GEN_IS_HASWELL - ib.CutIndexEnable = brw->prim_restart.enable_cut_index; + assert(brw->ib.enable_cut_index == brw->prim_restart.enable_cut_index); + ib.CutIndexEnable = brw->ib.enable_cut_index; #endif ib.IndexFormat = brw_get_index_type(index_buffer->index_size); |