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author | Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> | 2019-01-23 22:44:05 +0100 |
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committer | Dylan Baker <dylan@pnwbakers.com> | 2019-02-12 14:19:52 -0800 |
commit | a1ae60e9a30ec315323f3c770b8e53161ad98738 (patch) | |
tree | 6018e3d5a2f1419a458c1c7414b69c242f2b8462 | |
parent | 37ade3a566585df82abeb3bcf661624b695b79ac (diff) |
amd/common: Use correct writemask for shared memory stores.
The check was for 1 bit being set, which is clearly not what we want.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 3c24fc64c7a4e564d84843fab7db25963d574d99)
-rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 82ff5390352..b24f2d59fde 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2112,7 +2112,7 @@ visit_store_var(struct ac_nir_context *ctx, int writemask = instr->const_index[0]; LLVMValueRef address = get_src(ctx, instr->src[0]); LLVMValueRef val = get_src(ctx, instr->src[1]); - if (util_is_power_of_two_nonzero(writemask)) { + if (writemask == (1u << ac_get_llvm_num_components(val)) - 1) { val = LLVMBuildBitCast( ctx->ac.builder, val, LLVMGetElementType(LLVMTypeOf(address)), ""); |