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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2021-01-05 16:47:17 +0100
committerMarge Bot <eric+marge@anholt.net>2021-01-13 17:24:31 +0000
commit3c1275ccae620888108206799403999c1fc7e8b3 (patch)
treef7fa6e20e3d887c18e2f1657c3205021fdc0a65a
parent0ad83e33619a1d7547c34972eb1c6df62ed0bce7 (diff)
radv: enable DCC for MSAA on GFX10+21.0-branchpoint
It should work fine now. This gives +1-2% improvements with Control MSAA (2x and 4x) on Sienna. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8413>
-rw-r--r--src/amd/vulkan/radv_image.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 1573b3edc2e..90409792089 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -193,12 +193,10 @@ radv_use_dcc_for_image(struct radv_device *device,
if (pCreateInfo->arrayLayers > 1 && pCreateInfo->mipLevels > 1)
return false;
- /* FIXME: DCC for MSAA with 4x and 8x samples doesn't work yet, while
- * 2x can be enabled with an option.
- */
- if (pCreateInfo->samples > 2 ||
- (pCreateInfo->samples == 2 &&
- !device->physical_device->dcc_msaa_allowed))
+ /* TODO: Fix and enable DCC MSAA on older chips. */
+ if (pCreateInfo->samples > 1 &&
+ !device->physical_device->dcc_msaa_allowed &&
+ device->physical_device->rad_info.chip_class < GFX10)
return false;
/* Determine if the formats are DCC compatible. */