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authorNanley Chery <nanley.g.chery@intel.com>2018-05-23 15:50:14 -0700
committerDylan Baker <dylan@pnwbakers.com>2018-08-24 09:33:23 -0700
commit32331a3efcdd3e7f9277d13799b7914a72012fce (patch)
treeda0b012672110ec40c785d64a65632a70a21f3b2
parentb9c903b406df5b46dde6ab13b63887377d29e559 (diff)
i965/miptree: Drop an if case from retile_as_linear
Drop an if statement whose predicate never evaluates to true. row_pitch belongs to a surface with non-linear tiling. According to isl_calc_tiled_min_row_pitch, the pitch is a multiple of the tile width. By looking at isl_tiling_get_info, we see that non-linear tilings have widths greater than or equal to 128B. Cc: <mesa-stable@lists.freedesktop.org> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (cherry picked from commit 3df201e3e843b0c4fe810360f7e8b81de9c6a92a)
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index af67191b985..53e01120a92 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -518,10 +518,6 @@ need_to_retile_as_linear(struct brw_context *brw, unsigned row_pitch,
if (tiling == ISL_TILING_LINEAR)
return false;
- /* If the width is much smaller than a tile, don't bother tiling. */
- if (row_pitch < 64)
- return true;
-
if (ALIGN(row_pitch, 512) >= 32768) {
perf_debug("row pitch %u too large to blit, falling back to untiled",
row_pitch);