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authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2018-09-03 02:30:48 +0200
committerDylan Baker <dylan@pnwbakers.com>2018-09-04 08:50:14 -0700
commit1063fbe6cc70da0a39c0393116daf904783ce60a (patch)
tree0cb3dc6ebed271e1e749f341c81b32604f685045
parent5872b1522aed0f07d86fb219aa57e364a95cfff8 (diff)
radv: Use a lower max offchip buffer count.
No clue what gets fixed by this but both radeonsi and amdvlk do it. CC: <mesa-stable@lists.freedesktop.org> Reviewed-by: Dave Airlie <airlied@redhat.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (cherry picked from commit ab64891f4c6ebab214b84debb1254b134d6c7c64)
-rw-r--r--src/amd/vulkan/radv_device.c24
1 files changed, 22 insertions, 2 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index aced3eee399..57621bd972a 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1860,10 +1860,30 @@ radv_get_hs_offchip_param(struct radv_device *device, uint32_t *max_offchip_buff
device->physical_device->rad_info.family != CHIP_CARRIZO &&
device->physical_device->rad_info.family != CHIP_STONEY;
unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
- unsigned max_offchip_buffers = max_offchip_buffers_per_se *
- device->physical_device->rad_info.max_se;
+ unsigned max_offchip_buffers;
unsigned offchip_granularity;
unsigned hs_offchip_param;
+
+ /*
+ * Per RadeonSI:
+ * This must be one less than the maximum number due to a hw limitation.
+ * Various hardware bugs in SI, CIK, and GFX9 need this.
+ *
+ * Per AMDVLK:
+ * Vega10 should limit max_offchip_buffers to 508 (4 * 127).
+ * Gfx7 should limit max_offchip_buffers to 508
+ * Gfx6 should limit max_offchip_buffers to 126 (2 * 63)
+ *
+ * Follow AMDVLK here.
+ */
+ if (device->physical_device->rad_info.family == CHIP_VEGA10 ||
+ device->physical_device->rad_info.chip_class == CIK ||
+ device->physical_device->rad_info.chip_class == SI)
+ --max_offchip_buffers_per_se;
+
+ max_offchip_buffers = max_offchip_buffers_per_se *
+ device->physical_device->rad_info.max_se;
+
switch (device->tess_offchip_block_dw_size) {
default:
assert(0);