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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2017-05-21 07:39:07 +0300
committerAndres Gomez <agomez@igalia.com>2017-06-28 20:15:03 +0300
commit604304d528273ecd5d99f14bb3bbb6e30981ee44 (patch)
tree2b663ee956792b5d9f31d91d9da01a196159039b
parent7872aae4b7bb61ad668bc9e05f59165ff94cd34d (diff)
i965/gen4: Set depth offset when there is stencil attachment only
Current version fails to set depthstencil.depth_offset when there is only stencil attachment (it does set the intra tile offsets though). Fixes piglits: g45,g965,ilk: depthstencil-render-miplevels 1024 s=z24_s8 g45,ilk: depthstencil-render-miplevels 273 s=z24_s8 CC: mesa-stable@lists.freedesktop.org Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (cherry picked from commit 69672859814f36e9b8756b8f1c4655c49b9f6f4f)
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 4693f778b5b..61a0c4cb5be 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -457,6 +457,12 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw,
brw->depthstencil.stencil_offset =
(stencil_draw_y & ~tile_mask_y) * stencil_mt->pitch +
(stencil_draw_x & ~tile_mask_x) * 64;
+ } else if (!depth_irb) {
+ brw->depthstencil.depth_offset =
+ intel_miptree_get_aligned_offset(
+ stencil_mt,
+ stencil_irb->draw_x & ~tile_mask_x,
+ stencil_irb->draw_y & ~tile_mask_y);
}
}
}