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authorJonas Kulla <nyocurio@gmail.com>2017-06-19 19:46:23 +0200
committerAndres Gomez <agomez@igalia.com>2017-06-28 20:15:04 +0300
commit527cbf088e85bb18260556a71c55321e87bed317 (patch)
treecd151c9e926cfe3a7d7a7b6bc834fece6e6c8f2d
parent6227edd9782e004bf0f7a7a55702088ca2b01b97 (diff)
anv: Fix L3 cache programming on Bay Trail
Valid values for URBAllocation start at 32, so substract that before programming the register. This was missed when porting from the GL driver. Cc: "17.1" <mesa-stable@lists.freedesktop.org> Reviewed-by: Francisco Jerez <currojerez@riseup.net> Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit a52ee32a9a49b48c51a80b8a35aa26bd583cabb7)
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 4531c75caef..697bc52ac45 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -822,7 +822,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
anv_pack_struct(&l3cr2, GENX(L3CNTLREG2),
.SLMEnable = has_slm,
.URBLowBandwidth = urb_low_bw,
- .URBAllocation = cfg->n[GEN_L3P_URB],
+ .URBAllocation = cfg->n[GEN_L3P_URB] - n0_urb,
#if !GEN_IS_HASWELL
.ALLAllocation = cfg->n[GEN_L3P_ALL],
#endif