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authorMarek Olšák <marek.olsak@amd.com>2017-01-17 22:03:23 +0100
committerMarek Olšák <marek.olsak@amd.com>2017-01-18 19:51:31 +0100
commitc67a2793b369637c2b65263415a856c41f5e099e (patch)
treedfa0a0e36e3e20d6339b5b926fbd760953128b79
parent1db2bf8d2b1554225132c7b350b0aabb01022e20 (diff)
radeonsi: determine in advance which VBOs should be added to the buffer list
v2: now it should be correct Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c8
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c6
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h1
3 files changed, 11 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index f61dec6c8e5..df0905d8977 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -939,7 +939,6 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
{
struct si_vertex_element *velems = sctx->vertex_elements;
struct si_descriptors *desc = &sctx->vertex_buffers;
- bool bound[SI_NUM_VERTEX_BUFFERS] = {};
unsigned i, count = velems->count;
uint64_t va;
uint32_t *ptr;
@@ -948,6 +947,7 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
return true;
unsigned fix_size3 = velems->fix_size3;
+ unsigned first_vb_use_mask = velems->first_vb_use_mask;
/* Vertex buffer descriptors are the only ones which are uploaded
* directly through a staging buffer and don't go through
@@ -969,9 +969,10 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
struct pipe_vertex_buffer *vb;
struct r600_resource *rbuffer;
unsigned offset;
+ unsigned vbo_index = ve->vertex_buffer_index;
uint32_t *desc = &ptr[i*4];
- vb = &sctx->vertex_buffer[ve->vertex_buffer_index];
+ vb = &sctx->vertex_buffer[vbo_index];
rbuffer = (struct r600_resource*)vb->buffer;
if (!rbuffer) {
memset(desc, 0, 16);
@@ -1018,11 +1019,10 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
desc[3] = velems->rsrc_word3[i];
- if (!bound[ve->vertex_buffer_index]) {
+ if (first_vb_use_mask & (1 << i)) {
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
(struct r600_resource*)vb->buffer,
RADEON_USAGE_READ, RADEON_PRIO_VERTEX_BUFFER);
- bound[ve->vertex_buffer_index] = true;
}
}
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 3022260f2ff..f60a4992bc3 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3323,6 +3323,7 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
const struct pipe_vertex_element *elements)
{
struct si_vertex_element *v = CALLOC_STRUCT(si_vertex_element);
+ bool used[SI_NUM_VERTEX_BUFFERS] = {};
int i;
assert(count <= SI_MAX_ATTRIBS);
@@ -3342,6 +3343,11 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
return NULL;
}
+ if (!used[vbo_index]) {
+ v->first_vb_use_mask |= 1 << i;
+ used[vbo_index] = true;
+ }
+
desc = util_format_description(elements[i].src_format);
first_non_void = util_format_get_first_non_void_channel(elements[i].src_format);
data_format = si_translate_buffer_dataformat(ctx->screen, desc, first_non_void);
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 34a0f578492..03e5011779b 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -99,6 +99,7 @@ struct si_stencil_ref {
struct si_vertex_element
{
unsigned count;
+ unsigned first_vb_use_mask;
/* Two bits per attribute indicating the size of each vector component
* in bytes if the size 3-workaround must be applied.