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authorMarek Olšák <marek.olsak@amd.com>2015-09-02 19:05:09 +0200
committerEmil Velikov <emil.l.velikov@gmail.com>2015-09-11 19:19:32 +0100
commitc62f82980c55a96189d1b32b4e56e6cdc67c3e81 (patch)
treeb1b25861f638a7042b9e152f141022b7397b556d
parent151f84f2db398fa5e165daa048cfd598970bdef8 (diff)
radeonsi: enable VGPR spilling on VI
This fixes corruption in Unigine Heaven on VI Cc: 11.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit 7956eae1c76e298ca1ded46679c1a9bf875ec4ee)
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 473a2e9ad12..ec8cce40285 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -195,9 +195,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
r600_target = radeon_llvm_get_r600_target(triple);
sctx->tm = LLVMCreateTargetMachine(r600_target, triple,
r600_get_llvm_processor_name(sscreen->b.family),
- sctx->b.chip_class >= VI ?
- "+DumpCode" :
- "+DumpCode,+vgpr-spilling",
+ "+DumpCode,+vgpr-spilling",
LLVMCodeGenLevelDefault,
LLVMRelocDefault,
LLVMCodeModelDefault);