diff options
| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2015-07-18 18:38:42 -0400 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2015-07-22 17:09:40 +0100 |
| commit | 7efc693ef26c91c545c78f4b751432e43011b541 (patch) | |
| tree | 680e6ae46502adfd58a316efa2a09a52ede8048d | |
| parent | 440f465f5f38c0f522eea3a79d94663954b63864 (diff) | |
nvc0/ir: don't worry about sampler in txq handling
There's no need to deal with samplers for texture size queries. That
code also was accidentally setting an invalid sIndirectSrc position, but
it can now just be removed.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
(cherry picked from commit 346ce0b98832e33d5411200002571b3edea9e2bb)
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 30 |
1 files changed, 8 insertions, 22 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index da364f2ad04..e71fa113d99 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -956,44 +956,30 @@ NVC0LoweringPass::handleTXD(TexInstruction *txd) bool NVC0LoweringPass::handleTXQ(TexInstruction *txq) { - if (txq->tex.rIndirectSrc < 0 && txq->tex.sIndirectSrc < 0) + if (txq->tex.rIndirectSrc < 0) return true; Value *ticRel = txq->getIndirectR(); - Value *tscRel = txq->getIndirectS(); const int chipset = prog->getTarget()->getChipset(); txq->setIndirectS(NULL); txq->tex.sIndirectSrc = -1; + assert(ticRel); + if (chipset < NVISA_GK104_CHIPSET) { LValue *src = new_LValue(func, FILE_GPR); // 0xttxsaaaa - if (ticRel) { - txq->setSrc(txq->tex.rIndirectSrc, NULL); - if (txq->tex.r) - ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), - ticRel, bld.mkImm(txq->tex.r)); - } - if (tscRel) { - txq->setSrc(txq->tex.sIndirectSrc, NULL); - if (txq->tex.s) - tscRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), - tscRel, bld.mkImm(txq->tex.s)); - } - - bld.loadImm(src, 0); + txq->setSrc(txq->tex.rIndirectSrc, NULL); + if (txq->tex.r) + ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), + ticRel, bld.mkImm(txq->tex.r)); - if (ticRel) - bld.mkOp3(OP_INSBF, TYPE_U32, src, ticRel, bld.mkImm(0x0917), src); - if (tscRel) - bld.mkOp3(OP_INSBF, TYPE_U32, src, tscRel, bld.mkImm(0x0710), src); + bld.mkOp2(OP_SHL, TYPE_U32, src, ticRel, bld.mkImm(0x17)); txq->moveSources(0, 1); txq->setSrc(0, src); } else { - // XXX this ignores tsc, and assumes a 1:1 mapping - assert(txq->tex.rIndirectSrc >= 0); Value *hnd = loadTexHandle( bld.mkOp2v(OP_SHL, TYPE_U32, bld.getSSA(), txq->getIndirectR(), bld.mkImm(2)), |