diff options
author | Eric Anholt <eric@anholt.net> | 2014-02-14 16:06:31 -0800 |
---|---|---|
committer | Carl Worth <cworth@cworth.org> | 2014-05-14 12:53:08 -0700 |
commit | 13b142a42053b7aa0c5bc8df69c6e0d7b5f2085d (patch) | |
tree | e394a5c3b8d1b6feb38c3f98c01fdfb639f1ac14 | |
parent | 1ba2298131924daf34b4504ba748a782c5189f48 (diff) |
i965/vs: Use samplers for UBOs in the VS like we do for non-UBO pulls.
Improves performance of a dolphin emulator trace I had laying around by
3.60131% +/- 0.995887% (n=128).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 9245206cbfaaa4e18c1f3715eebb5f281070d772)
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index b5b8f362f5c..8f9108536a2 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1616,14 +1616,27 @@ vec4_visitor::visit(ir_expression *ir) emit(SHR(dst_reg(offset), op[1], src_reg(4))); } - vec4_instruction *pull = + if (brw->gen >= 7) { + dst_reg grf_offset = dst_reg(this, glsl_type::int_type); + grf_offset.type = offset.type; + + emit(MOV(grf_offset, offset)); + emit(new(mem_ctx) vec4_instruction(this, - VS_OPCODE_PULL_CONSTANT_LOAD, + VS_OPCODE_PULL_CONSTANT_LOAD_GEN7, dst_reg(packed_consts), surf_index, - offset)); - pull->base_mrf = 14; - pull->mlen = 1; + src_reg(grf_offset))); + } else { + vec4_instruction *pull = + emit(new(mem_ctx) vec4_instruction(this, + VS_OPCODE_PULL_CONSTANT_LOAD, + dst_reg(packed_consts), + surf_index, + offset)); + pull->base_mrf = 14; + pull->mlen = 1; + } packed_consts.swizzle = swizzle_for_size(ir->type->vector_elements); packed_consts.swizzle += BRW_SWIZZLE4(const_offset % 16 / 4, |