diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2013-10-16 13:43:08 -0400 |
|---|---|---|
| committer | Ian Romanick <ian.d.romanick@intel.com> | 2013-11-15 13:39:37 -0800 |
| commit | ade312cd8a42c0ccb37c91d02c88e0a5672ded9b (patch) | |
| tree | 887875239c9477fa0f2913c930c21eb57f59ff92 | |
| parent | f9a74a0b4c3dc36a3e9437ba13124b5ebf6583c3 (diff) | |
radeonsi/compute: Add Sea Islands support
(cherry picked from commit a859131003fc79094cf99c92cc6a11a0f0c659f7)
| -rw-r--r-- | src/gallium/drivers/radeonsi/radeonsi_compute.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/radeonsi_compute.c b/src/gallium/drivers/radeonsi/radeonsi_compute.c index 265dbd7ab59..49caa2c6a87 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_compute.c +++ b/src/gallium/drivers/radeonsi/radeonsi_compute.c @@ -161,9 +161,18 @@ static void radeonsi_launch_grid( si_pm4_add_bo(pm4, buffer, RADEON_USAGE_READWRITE); } - /* XXX: This should be: - * (number of compute units) * 4 * (waves per simd) - 1 */ - si_pm4_set_reg(pm4, R_00B82C_COMPUTE_MAX_WAVE_ID, 0x190 /* Default value */); + /* This register has been moved to R_00CD20_COMPUTE_MAX_WAVE_ID + * and is now per pipe, so it should be handled in the + * kernel if we want to use something other than the default value, + * which is now 0x22f. + */ + if (rctx->b.chip_class <= SI) { + /* XXX: This should be: + * (number of compute units) * 4 * (waves per simd) - 1 */ + + si_pm4_set_reg(pm4, R_00B82C_COMPUTE_MAX_WAVE_ID, + 0x190 /* Default value */); + } shader_va = r600_resource_va(ctx->screen, (void *)shader->bo); si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ); |