summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authordok666 <dok666>2003-05-13 19:57:57 +0000
committerdok666 <dok666>2003-05-13 19:57:57 +0000
commit3db0ad9c7643b0f0e73fff3dc256a757c20108e6 (patch)
treeffe7d16dfa1d6530dcb9b5f741517cb8a8814444
parentcc17359d5ba9f6121c5e9618e684f6ac9fd3039b (diff)
Patched MGA drm module is now binary compatible with the original one.
It's now possible to run either XFree86 DRI or DirectFBGL DRI using the same module! Compile drm modules with -D_HAVE_FULL_GL.
-rw-r--r--src/kernel/drm/Makefile2
-rw-r--r--src/kernel/drm/drm_drv.h2
-rw-r--r--src/kernel/drm/mga_dma.c22
-rw-r--r--src/kernel/drm/mga_drm.h300
-rw-r--r--src/kernel/drm/mga_drv.h11
-rw-r--r--src/kernel/drm/mga_state.c60
-rw-r--r--src/mesa/drivers/dri/mga/mga_xmesa.c1
-rw-r--r--src/mesa/drivers/dri/mga/mgacontext.h1
-rw-r--r--src/mesa/drivers/dri/mga/mgastate.c26
-rw-r--r--src/mesa/drivers/dri/mga/server/mga_common.h9
-rw-r--r--src/mesa/drivers/dri/mga/server/mga_sarea.h33
11 files changed, 277 insertions, 190 deletions
diff --git a/src/kernel/drm/Makefile b/src/kernel/drm/Makefile
index c3fa8f1877a..85143ad3954 100644
--- a/src/kernel/drm/Makefile
+++ b/src/kernel/drm/Makefile
@@ -74,7 +74,7 @@ RADEONHEADERS = radeon.h radeon_drv.h radeon_drm.h $(DRMHEADERS) \
INC = /usr/include
-CFLAGS = -O2 $(WARNINGS)
+CFLAGS = -O2 $(WARNINGS) -D_HAVE_FULL_GL
WARNINGS = -Wall -Wwrite-strings -Wpointer-arith -Wcast-align \
-Wstrict-prototypes -Wnested-externs \
-Wpointer-arith
diff --git a/src/kernel/drm/drm_drv.h b/src/kernel/drm/drm_drv.h
index 1a1ba36ff4b..772f03e2198 100644
--- a/src/kernel/drm/drm_drv.h
+++ b/src/kernel/drm/drm_drv.h
@@ -991,7 +991,7 @@ int DRM(ioctl)( struct inode *inode, struct file *filp,
if ( !func ) {
DRM_DEBUG( "no function\n" );
retcode = -EINVAL;
- } else if ( ( 0/*ioctl->root_only*/ && !capable( CAP_SYS_ADMIN ) )||
+ } else if ( ( ioctl->root_only && !capable( CAP_SYS_ADMIN ) )||
( ioctl->auth_needed && !priv->authenticated ) ) {
retcode = -EACCES;
} else {
diff --git a/src/kernel/drm/mga_dma.c b/src/kernel/drm/mga_dma.c
index 631c88e30a7..2e92819b210 100644
--- a/src/kernel/drm/mga_dma.c
+++ b/src/kernel/drm/mga_dma.c
@@ -474,7 +474,19 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
}
- /* FIXME: Need to support AGP textures...
+ dev_priv->maccess = init->maccess;
+
+ dev_priv->fb_cpp = init->fb_cpp;
+ dev_priv->front_offset = init->front_offset;
+ dev_priv->front_pitch = init->front_pitch;
+ dev_priv->back_offset = init->back_offset;
+ dev_priv->back_pitch = init->back_pitch;
+
+ dev_priv->depth_cpp = init->depth_cpp;
+ dev_priv->depth_offset = init->depth_offset;
+ dev_priv->depth_pitch = init->depth_pitch;
+
+ /* FIXME: Need to support AGP textures...
*/
dev_priv->texture_offset = init->texture_offset[0];
dev_priv->texture_size = init->texture_size[0];
@@ -628,6 +640,14 @@ int mga_do_cleanup_dma( drm_device_t *dev )
{
DRM_DEBUG( "\n" );
+#if _HAVE_DMA_IRQ
+ /* Make sure interrupts are disabled here because the uninstall ioctl
+ * may not have been called from userspace and after dev_private
+ * is freed, it's too late.
+ */
+ if ( dev->irq ) DRM(irq_uninstall)(dev);
+#endif
+
if ( dev->dev_private ) {
drm_mga_private_t *dev_priv = dev->dev_private;
diff --git a/src/kernel/drm/mga_drm.h b/src/kernel/drm/mga_drm.h
index eca3f7a6dd5..f6a4fbffd7b 100644
--- a/src/kernel/drm/mga_drm.h
+++ b/src/kernel/drm/mga_drm.h
@@ -119,118 +119,127 @@
#endif /* __MGA_SAREA_DEFINES__ */
+#define MGA_DSTORG_EXTENDED_CONTEXT 0xf0f1f2f3 /* magic value */
/* Setup registers for 3D context
*/
typedef struct {
- unsigned int fb_cpp;
- unsigned int front_offset;
- unsigned int front_pitch;
- unsigned int back_offset;
- unsigned int back_pitch;
- unsigned int draw_offset;
- unsigned int draw_pitch;
-
- unsigned int depth_cpp;
- unsigned int depth_offset;
- unsigned int depth_pitch;
-
- unsigned int maccess;
- unsigned int plnwt;
- unsigned int dwgctl;
- unsigned int alphactrl;
- unsigned int fogcolor;
- unsigned int wflag;
- unsigned int tdualstage0;
- unsigned int tdualstage1;
- unsigned int fcol;
- unsigned int stencil;
- unsigned int stencilctl;
+ unsigned int dstorg; /* set to MGA_DSTORG_EXTENDED_CONTEXT to use
+ extended context information */
+ unsigned int maccess;
+ unsigned int plnwt;
+ unsigned int dwgctl;
+ unsigned int alphactrl;
+ unsigned int fogcolor;
+ unsigned int wflag;
+ unsigned int tdualstage0;
+ unsigned int tdualstage1;
+ unsigned int fcol;
+ unsigned int stencil;
+ unsigned int stencilctl;
} drm_mga_context_regs_t;
+typedef struct {
+ unsigned int fb_cpp;
+ unsigned int front_offset;
+ unsigned int front_pitch;
+ unsigned int back_offset;
+ unsigned int back_pitch;
+ unsigned int draw_offset;
+ unsigned int draw_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset;
+ unsigned int depth_pitch;
+} drm_mga_extended_context_regs_t;
+
/* Setup registers for 2D, X server
*/
typedef struct {
- unsigned int pitch;
+ unsigned int pitch;
} drm_mga_server_regs_t;
/* Setup registers for each texture unit
*/
typedef struct {
- unsigned int texctl;
- unsigned int texctl2;
- unsigned int texfilter;
- unsigned int texbordercol;
- unsigned int texorg;
- unsigned int texwidth;
- unsigned int texheight;
- unsigned int texorg1;
- unsigned int texorg2;
- unsigned int texorg3;
- unsigned int texorg4;
+ unsigned int texctl;
+ unsigned int texctl2;
+ unsigned int texfilter;
+ unsigned int texbordercol;
+ unsigned int texorg;
+ unsigned int texwidth;
+ unsigned int texheight;
+ unsigned int texorg1;
+ unsigned int texorg2;
+ unsigned int texorg3;
+ unsigned int texorg4;
} drm_mga_texture_regs_t;
/* General aging mechanism
*/
typedef struct {
- unsigned int head; /* Position of head pointer */
- unsigned int wrap; /* Primary DMA wrap count */
+ unsigned int head; /* Position of head pointer */
+ unsigned int wrap; /* Primary DMA wrap count */
} drm_mga_age_t;
typedef struct _drm_mga_sarea {
- /* The channel for communication of state information to the kernel
- * on firing a vertex dma buffer.
- */
- drm_mga_context_regs_t context_state;
- drm_mga_server_regs_t server_state;
- drm_mga_texture_regs_t tex_state[2];
- unsigned int warp_pipe;
- unsigned int dirty;
- unsigned int vertsize;
-
- /* The current cliprects, or a subset thereof.
- */
- drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
- unsigned int nbox;
-
- /* Information about the most recently used 3d drawable. The
- * client fills in the req_* fields, the server fills in the
- * exported_ fields and puts the cliprects into boxes, above.
- *
- * The client clears the exported_drawable field before
- * clobbering the boxes data.
- */
- unsigned int req_drawable; /* the X drawable id */
- unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
-
- unsigned int exported_drawable;
- unsigned int exported_index;
- unsigned int exported_stamp;
- unsigned int exported_buffers;
- unsigned int exported_nfront;
- unsigned int exported_nback;
- int exported_back_x, exported_front_x, exported_w;
- int exported_back_y, exported_front_y, exported_h;
- drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
-
- /* Counters for aging textures and for client-side throttling.
- */
- unsigned int status[4];
- unsigned int last_wrap;
-
- drm_mga_age_t last_frame;
- unsigned int last_enqueue; /* last time a buffer was enqueued */
- unsigned int last_dispatch; /* age of the most recently dispatched buffer */
- unsigned int last_quiescent; /* */
-
- /* LRU lists for texture memory in agp space and on the card.
- */
- drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
- unsigned int texAge[MGA_NR_TEX_HEAPS];
-
- /* Mechanism to validate card state.
- */
- int ctxOwner;
+ /* The channel for communication of state information to the kernel
+ * on firing a vertex dma buffer.
+ */
+ drm_mga_context_regs_t context_state;
+ drm_mga_server_regs_t server_state;
+ drm_mga_texture_regs_t tex_state[2];
+ unsigned int warp_pipe;
+ unsigned int dirty;
+ unsigned int vertsize;
+
+ /* The current cliprects, or a subset thereof.
+ */
+ drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
+ unsigned int nbox;
+
+ /* Information about the most recently used 3d drawable. The
+ * client fills in the req_* fields, the server fills in the
+ * exported_ fields and puts the cliprects into boxes, above.
+ *
+ * The client clears the exported_drawable field before
+ * clobbering the boxes data.
+ */
+ unsigned int req_drawable; /* the X drawable id */
+ unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
+
+ unsigned int exported_drawable;
+ unsigned int exported_index;
+ unsigned int exported_stamp;
+ unsigned int exported_buffers;
+ unsigned int exported_nfront;
+ unsigned int exported_nback;
+ int exported_back_x, exported_front_x, exported_w;
+ int exported_back_y, exported_front_y, exported_h;
+ drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
+
+ /* Counters for aging textures and for client-side throttling.
+ */
+ unsigned int status[4];
+ unsigned int last_wrap;
+
+ drm_mga_age_t last_frame;
+ unsigned int last_enqueue; /* last time a buffer was enqueued */
+ unsigned int last_dispatch; /* age of the most recently dispatched buffer */
+ unsigned int last_quiescent; /* */
+
+ /* LRU lists for texture memory in agp space and on the card.
+ */
+ drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
+ unsigned int texAge[MGA_NR_TEX_HEAPS];
+
+ /* Mechanism to validate card state.
+ */
+ int ctxOwner;
+
+ /* Extended context
+ */
+ drm_mga_extended_context_regs_t extended_context;
} drm_mga_sarea_t;
@@ -253,76 +262,85 @@ typedef struct _drm_mga_sarea {
#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(0x49, drm_mga_getparam_t)
typedef struct _drm_mga_warp_index {
- int installed;
- unsigned long phys_addr;
- int size;
+ int installed;
+ unsigned long phys_addr;
+ int size;
} drm_mga_warp_index_t;
typedef struct drm_mga_init {
- enum {
- MGA_INIT_DMA = 0x01,
- MGA_CLEANUP_DMA = 0x02
- } func;
-
- unsigned long sarea_priv_offset;
-
- int chipset;
- int sgram;
-
- unsigned int texture_offset[MGA_NR_TEX_HEAPS];
- unsigned int texture_size[MGA_NR_TEX_HEAPS];
-
- unsigned long fb_offset;
- unsigned long mmio_offset;
- unsigned long status_offset;
- unsigned long warp_offset;
- unsigned long primary_offset;
- unsigned long buffers_offset;
+ enum {
+ MGA_INIT_DMA = 0x01,
+ MGA_CLEANUP_DMA = 0x02
+ } func;
+
+ unsigned long sarea_priv_offset;
+
+ int chipset;
+ int sgram;
+
+ unsigned int maccess;
+
+ unsigned int fb_cpp;
+ unsigned int front_offset, front_pitch;
+ unsigned int back_offset, back_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset, depth_pitch;
+
+ unsigned int texture_offset[MGA_NR_TEX_HEAPS];
+ unsigned int texture_size[MGA_NR_TEX_HEAPS];
+
+ unsigned long fb_offset;
+ unsigned long mmio_offset;
+ unsigned long status_offset;
+ unsigned long warp_offset;
+ unsigned long primary_offset;
+ unsigned long buffers_offset;
} drm_mga_init_t;
typedef struct drm_mga_fullscreen {
- enum {
- MGA_INIT_FULLSCREEN = 0x01,
- MGA_CLEANUP_FULLSCREEN = 0x02
- } func;
+ enum {
+ MGA_INIT_FULLSCREEN = 0x01,
+ MGA_CLEANUP_FULLSCREEN = 0x02
+ } func;
} drm_mga_fullscreen_t;
typedef struct drm_mga_clear {
- unsigned int flags;
- unsigned int clear_color;
- unsigned int clear_depth;
- unsigned int color_mask;
- unsigned int depth_mask;
+ unsigned int flags;
+ unsigned int clear_color;
+ unsigned int clear_depth;
+ unsigned int color_mask;
+ unsigned int depth_mask;
} drm_mga_clear_t;
typedef struct drm_mga_vertex {
- int idx; /* buffer to queue */
- int used; /* bytes in use */
- int discard; /* client finished with buffer? */
+ int idx; /* buffer to queue */
+ int used; /* bytes in use */
+ int discard; /* client finished with buffer? */
} drm_mga_vertex_t;
typedef struct drm_mga_indices {
- int idx; /* buffer to queue */
- unsigned int start;
- unsigned int end;
- int discard; /* client finished with buffer? */
+ int idx; /* buffer to queue */
+ unsigned int start;
+ unsigned int end;
+ int discard; /* client finished with buffer? */
} drm_mga_indices_t;
typedef struct drm_mga_iload {
- int idx;
- unsigned int dstorg;
- unsigned int length;
+ int idx;
+ unsigned int dstorg;
+ unsigned int length;
} drm_mga_iload_t;
typedef struct _drm_mga_blit {
- unsigned int planemask;
- unsigned int srcorg;
- unsigned int dstorg;
- int src_pitch, dst_pitch;
- int delta_sx, delta_sy;
- int delta_dx, delta_dy;
- int height, ydir; /* flip image vertically */
- int source_pitch, dest_pitch;
+ unsigned int planemask;
+ unsigned int srcorg;
+ unsigned int dstorg;
+ int src_pitch, dst_pitch;
+ int delta_sx, delta_sy;
+ int delta_dx, delta_dy;
+ int height, ydir; /* flip image vertically */
+ int source_pitch, dest_pitch;
} drm_mga_blit_t;
/* 3.1: An ioctl to get parameters that aren't available to the 3d
@@ -331,8 +349,8 @@ typedef struct _drm_mga_blit {
#define MGA_PARAM_IRQ_NR 1
typedef struct drm_mga_getparam {
- int param;
- int *value;
+ int param;
+ int *value;
} drm_mga_getparam_t;
#endif
diff --git a/src/kernel/drm/mga_drv.h b/src/kernel/drm/mga_drv.h
index 9e9c44e5b99..41738085a10 100644
--- a/src/kernel/drm/mga_drv.h
+++ b/src/kernel/drm/mga_drv.h
@@ -75,6 +75,17 @@ typedef struct drm_mga_private {
int usec_timeout;
u32 clear_cmd;
+ u32 maccess;
+
+ unsigned int fb_cpp;
+ unsigned int front_offset;
+ unsigned int front_pitch;
+ unsigned int back_offset;
+ unsigned int back_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset;
+ unsigned int depth_pitch;
unsigned int texture_offset;
unsigned int texture_size;
diff --git a/src/kernel/drm/mga_state.c b/src/kernel/drm/mga_state.c
index a06f47cb43e..c8e83fb1e74 100644
--- a/src/kernel/drm/mga_state.c
+++ b/src/kernel/drm/mga_state.c
@@ -38,6 +38,14 @@
#include "mga_drm.h"
#include "mga_drv.h"
+#define MGA_CONTEXT(v) ((ctx->dstorg == MGA_DSTORG_EXTENDED_CONTEXT) ? \
+ ectx->v : dev_priv->v)
+
+#define MGA_DRAW_OFFSET() ((ctx->dstorg == MGA_DSTORG_EXTENDED_CONTEXT) ? \
+ ectx->draw_offset : ctx->dstorg)
+
+#define MGA_DRAW_PITCH() ((ctx->dstorg == MGA_DSTORG_EXTENDED_CONTEXT) ? \
+ ectx->draw_pitch : dev_priv->front_pitch)
/* ================================================================
* DMA hardware state programming functions
@@ -48,7 +56,8 @@ static void mga_emit_clip_rect( drm_mga_private_t *dev_priv,
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
- unsigned int pitch = ctx->draw_pitch;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
+ unsigned int pitch = MGA_DRAW_PITCH();
DMA_LOCALS;
BEGIN_DMA( 2 );
@@ -73,11 +82,12 @@ static __inline__ void mga_g200_emit_context( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
DMA_LOCALS;
BEGIN_DMA( 3 );
- DMA_BLOCK( MGA_DSTORG, ctx->draw_offset,
+ DMA_BLOCK( MGA_DSTORG, MGA_DRAW_OFFSET(),
MGA_MACCESS, ctx->maccess,
MGA_PLNWT, ctx->plnwt,
MGA_DWGCTL, ctx->dwgctl );
@@ -85,10 +95,10 @@ static __inline__ void mga_g200_emit_context( drm_mga_private_t *dev_priv )
DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl,
MGA_FOGCOL, ctx->fogcolor,
MGA_WFLAG, ctx->wflag,
- MGA_ZORG, ctx->depth_offset );
+ MGA_ZORG, MGA_CONTEXT(depth_offset) );
DMA_BLOCK( MGA_FCOL, ctx->fcol,
- MGA_PITCH, ctx->draw_pitch,
+ MGA_PITCH, MGA_DRAW_PITCH(),
MGA_DMAPAD, 0x00000000,
MGA_DMAPAD, 0x00000000 );
@@ -99,11 +109,12 @@ static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
DMA_LOCALS;
BEGIN_DMA( 4 );
- DMA_BLOCK( MGA_DSTORG, ctx->draw_offset,
+ DMA_BLOCK( MGA_DSTORG, MGA_DRAW_OFFSET(),
MGA_MACCESS, ctx->maccess,
MGA_PLNWT, ctx->plnwt,
MGA_DWGCTL, ctx->dwgctl );
@@ -111,7 +122,7 @@ static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv )
DMA_BLOCK( MGA_ALPHACTRL, ctx->alphactrl,
MGA_FOGCOL, ctx->fogcolor,
MGA_WFLAG, ctx->wflag,
- MGA_ZORG, ctx->depth_offset );
+ MGA_ZORG, MGA_CONTEXT(depth_offset) );
DMA_BLOCK( MGA_WFLAG1, ctx->wflag,
MGA_TDUALSTAGE0, ctx->tdualstage0,
@@ -120,7 +131,7 @@ static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv )
DMA_BLOCK( MGA_STENCIL, ctx->stencil,
MGA_STENCILCTL, ctx->stencilctl,
- MGA_PITCH, ctx->draw_pitch,
+ MGA_PITCH, MGA_DRAW_PITCH(),
MGA_DMAPAD, 0x00000000 );
ADVANCE_DMA();
@@ -518,6 +529,7 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
drm_clip_rect_t *pbox = sarea_priv->boxes;
int nbox = sarea_priv->nbox;
int i;
@@ -548,9 +560,9 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
MGA_YDSTLEN, (box->y1 << 16) | height,
MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
- DMA_BLOCK( MGA_PITCH, ctx->front_pitch,
+ DMA_BLOCK( MGA_PITCH, MGA_CONTEXT(front_pitch),
MGA_FCOL, clear->clear_color,
- MGA_DSTORG, ctx->front_offset,
+ MGA_DSTORG, MGA_CONTEXT(front_offset),
MGA_DWGCTL + MGA_EXEC,
dev_priv->clear_cmd );
@@ -566,9 +578,9 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
MGA_YDSTLEN, (box->y1 << 16) | height,
MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
- DMA_BLOCK( MGA_PITCH, ctx->back_pitch,
+ DMA_BLOCK( MGA_PITCH, MGA_CONTEXT(back_pitch),
MGA_FCOL, clear->clear_color,
- MGA_DSTORG, ctx->back_offset,
+ MGA_DSTORG, MGA_CONTEXT(back_offset),
MGA_DWGCTL + MGA_EXEC,
dev_priv->clear_cmd );
@@ -583,9 +595,9 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
MGA_YDSTLEN, (box->y1 << 16) | height,
MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
- DMA_BLOCK( MGA_PITCH, ctx->depth_pitch,
+ DMA_BLOCK( MGA_PITCH, MGA_CONTEXT(depth_pitch),
MGA_FCOL, clear->clear_depth,
- MGA_DSTORG, ctx->depth_offset,
+ MGA_DSTORG, MGA_CONTEXT(depth_offset),
MGA_DWGCTL + MGA_EXEC,
dev_priv->clear_cmd );
@@ -612,6 +624,7 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
drm_clip_rect_t *pbox = sarea_priv->boxes;
int nbox = sarea_priv->nbox;
int i;
@@ -628,10 +641,10 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
MGA_DWGSYNC, 0x00007100,
MGA_DWGSYNC, 0x00007000 );
- DMA_BLOCK( MGA_DSTORG, ctx->front_offset,
+ DMA_BLOCK( MGA_DSTORG, MGA_CONTEXT(front_offset),
MGA_MACCESS, ctx->maccess,
- MGA_SRCORG, ctx->back_offset,
- MGA_AR5, ctx->front_pitch );
+ MGA_SRCORG, MGA_CONTEXT(back_offset),
+ MGA_AR5, MGA_CONTEXT(front_pitch) );
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
MGA_DMAPAD, 0x00000000,
@@ -641,7 +654,7 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
for ( i = 0 ; i < nbox ; i++ ) {
drm_clip_rect_t *box = &pbox[i];
u32 height = box->y2 - box->y1;
- u32 start = box->y1 * ctx->front_pitch;
+ u32 start = box->y1 * MGA_CONTEXT(front_pitch);
DRM_DEBUG( " from=%d,%d to=%d,%d\n",
box->x1, box->y1, box->x2, box->y2 );
@@ -655,7 +668,7 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
MGA_PLNWT, ctx->plnwt,
- MGA_SRCORG, ctx->front_offset,
+ MGA_SRCORG, MGA_CONTEXT(front_offset),
MGA_DWGCTL, ctx->dwgctl );
ADVANCE_DMA();
@@ -766,7 +779,9 @@ static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
- drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
+ drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
+ drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
u32 y2;
DMA_LOCALS;
@@ -797,8 +812,8 @@ static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
MGA_YDSTLEN + MGA_EXEC, y2 );
DMA_BLOCK( MGA_PLNWT, ctx->plnwt,
- MGA_SRCORG, ctx->front_offset,
- MGA_PITCH, ctx->front_pitch,
+ MGA_SRCORG, MGA_CONTEXT(front_offset),
+ MGA_PITCH, MGA_CONTEXT(front_pitch),
MGA_DWGSYNC, 0x00007000 );
ADVANCE_DMA();
@@ -820,6 +835,7 @@ static void mga_dma_dispatch_blit( drm_device_t *dev,
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
+ drm_mga_extended_context_regs_t *ectx = &sarea_priv->extended_context;
drm_clip_rect_t *pbox = sarea_priv->boxes;
int nbox = sarea_priv->nbox;
u32 scandir = 0, i;
@@ -870,7 +886,7 @@ static void mga_dma_dispatch_blit( drm_device_t *dev,
/* Force reset of DWGCTL */
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
MGA_PLNWT, ctx->plnwt,
- MGA_PITCH, ctx->front_pitch,
+ MGA_PITCH, MGA_CONTEXT(front_pitch),
MGA_DWGCTL, ctx->dwgctl );
ADVANCE_DMA();
diff --git a/src/mesa/drivers/dri/mga/mga_xmesa.c b/src/mesa/drivers/dri/mga/mga_xmesa.c
index 0d44e6982e5..6ac660b9971 100644
--- a/src/mesa/drivers/dri/mga/mga_xmesa.c
+++ b/src/mesa/drivers/dri/mga/mga_xmesa.c
@@ -646,6 +646,7 @@ void mgaGetLock( mgaContextPtr mmesa, GLuint flags )
mmesa->dirty |= MGA_UPLOAD_CONTEXT | MGA_UPLOAD_CLIPRECTS;
memcpy( &sarea->ContextState, &mmesa->setup, sizeof(mmesa->setup));
+ memcpy( &sarea->extended_context, &mmesa->esetup, sizeof(mmesa->esetup));
mmesa->sarea->dirty |= MGA_UPLOAD_CONTEXT;
if (sarea->ctxOwner != me) {
diff --git a/src/mesa/drivers/dri/mga/mgacontext.h b/src/mesa/drivers/dri/mga/mgacontext.h
index 077cdde1bae..b214d499041 100644
--- a/src/mesa/drivers/dri/mga/mgacontext.h
+++ b/src/mesa/drivers/dri/mga/mgacontext.h
@@ -228,6 +228,7 @@ struct mga_context_t {
GLuint dirty;
mga_context_regs_t setup;
+ mga_extended_context_regs_t esetup;
GLuint ClearColor;
GLuint ClearDepth;
diff --git a/src/mesa/drivers/dri/mga/mgastate.c b/src/mesa/drivers/dri/mga/mgastate.c
index 9e5d8769146..9ce7889bebc 100644
--- a/src/mesa/drivers/dri/mga/mgastate.c
+++ b/src/mesa/drivers/dri/mga/mgastate.c
@@ -812,37 +812,37 @@ static void mgaUpdateBuffers(mgaContextPtr mmesa)
{
__DRIdrawablePrivate *driDrawable = mmesa->driDrawable;
- mmesa->setup.fb_cpp = driDrawable->cpp;
+ mmesa->esetup.fb_cpp = driDrawable->cpp;
- mmesa->setup.front_pitch = driDrawable->frontPitch / driDrawable->cpp;
- mmesa->setup.front_offset = driDrawable->frontOffset;
+ mmesa->esetup.front_pitch = driDrawable->frontPitch / driDrawable->cpp;
+ mmesa->esetup.front_offset = driDrawable->frontOffset;
- mmesa->setup.back_pitch = driDrawable->backPitch / driDrawable->cpp;
- mmesa->setup.back_offset = driDrawable->backOffset;
+ mmesa->esetup.back_pitch = driDrawable->backPitch / driDrawable->cpp;
+ mmesa->esetup.back_offset = driDrawable->backOffset;
switch (mmesa->draw_buffer) {
case MGA_FRONT:
mmesa->drawOffset = driDrawable->frontOffset;
mmesa->readOffset = driDrawable->frontOffset;
- mmesa->setup.draw_pitch = mmesa->setup.front_pitch;
- mmesa->setup.draw_offset = mmesa->setup.front_offset;
+ mmesa->esetup.draw_pitch = mmesa->esetup.front_pitch;
+ mmesa->esetup.draw_offset = mmesa->esetup.front_offset;
break;
case MGA_BACK:
mmesa->drawOffset = driDrawable->backOffset;
mmesa->readOffset = driDrawable->backOffset;
- mmesa->setup.draw_pitch = mmesa->setup.back_pitch;
- mmesa->setup.draw_offset = mmesa->setup.back_offset;
+ mmesa->esetup.draw_pitch = mmesa->esetup.back_pitch;
+ mmesa->esetup.draw_offset = mmesa->esetup.back_offset;
break;
default:
break;
}
- mmesa->setup.depth_cpp = driDrawable->depthCpp;
+ mmesa->esetup.depth_cpp = driDrawable->depthCpp;
- mmesa->setup.depth_pitch = driDrawable->depthPitch / driDrawable->depthCpp;
- mmesa->setup.depth_offset = driDrawable->depthOffset;
+ mmesa->esetup.depth_pitch = driDrawable->depthPitch / driDrawable->depthCpp;
+ mmesa->esetup.depth_offset = driDrawable->depthOffset;
mmesa->setup.maccess = (MA_memreset_disable |
MA_fogen_disable |
@@ -1229,6 +1229,8 @@ void mgaInitState( mgaContextPtr mmesa )
mmesa->hw.cull_dualtex = _CULL_POSITIVE;*/
mmesa->hw.specen = 0;
+ mmesa->setup.dstorg = MGA_DSTORG_EXTENDED_CONTEXT;
+
mmesa->setup.dwgctl = (DC_opcod_trap |
DC_linear_xy |
DC_solid_disable |
diff --git a/src/mesa/drivers/dri/mga/server/mga_common.h b/src/mesa/drivers/dri/mga/server/mga_common.h
index e2fe599355a..baa53a61ea8 100644
--- a/src/mesa/drivers/dri/mga/server/mga_common.h
+++ b/src/mesa/drivers/dri/mga/server/mga_common.h
@@ -71,6 +71,15 @@ typedef struct {
int chipset;
int sgram;
+ unsigned int maccess;
+
+ unsigned int fb_cpp;
+ unsigned int front_offset, front_pitch;
+ unsigned int back_offset, back_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset, depth_pitch;
+
unsigned int texture_offset[DRM_MGA_NR_TEX_HEAPS];
unsigned int texture_size[DRM_MGA_NR_TEX_HEAPS];
diff --git a/src/mesa/drivers/dri/mga/server/mga_sarea.h b/src/mesa/drivers/dri/mga/server/mga_sarea.h
index 52d5b0219ca..7624ec6a8cb 100644
--- a/src/mesa/drivers/dri/mga/server/mga_sarea.h
+++ b/src/mesa/drivers/dri/mga/server/mga_sarea.h
@@ -112,22 +112,13 @@
#endif /* __MGA_SAREA_DEFINES__ */
+#define MGA_DSTORG_EXTENDED_CONTEXT 0xf0f1f2f3 /* magic value */
/* Setup registers for 3D context
*/
typedef struct {
- unsigned int fb_cpp;
- unsigned int front_offset;
- unsigned int front_pitch;
- unsigned int back_offset;
- unsigned int back_pitch;
- unsigned int draw_offset;
- unsigned int draw_pitch;
-
- unsigned int depth_cpp;
- unsigned int depth_offset;
- unsigned int depth_pitch;
-
+ unsigned int dstorg; /* set to MGA_DSTORG_EXTENDED_CONTEXT to use
+ extended context information */
unsigned int maccess;
unsigned int plnwt;
unsigned int dwgctl;
@@ -141,6 +132,20 @@ typedef struct {
unsigned int stencilctl;
} mga_context_regs_t;
+typedef struct {
+ unsigned int fb_cpp;
+ unsigned int front_offset;
+ unsigned int front_pitch;
+ unsigned int back_offset;
+ unsigned int back_pitch;
+ unsigned int draw_offset;
+ unsigned int draw_pitch;
+
+ unsigned int depth_cpp;
+ unsigned int depth_offset;
+ unsigned int depth_pitch;
+} mga_extended_context_regs_t;
+
/* Setup registers for 2D, X server
*/
typedef struct {
@@ -228,6 +233,10 @@ typedef struct {
/* Last context that uploaded statel
*/
int ctxOwner;
+
+ /* Extended context
+ */
+ mga_extended_context_regs_t extended_context;
} MGASAREAPrivRec, *MGASAREAPrivPtr;
#endif