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authorCarl Worth <cworth@cworth.org>2013-10-04 21:19:29 -0700
committerCarl Worth <cworth@cworth.org>2013-10-04 21:19:29 -0700
commit7d4a1f508b482f40a831c4e411b53a24e4a0c330 (patch)
tree5c9c975077b6cf8af70d88185eb547b093a3031e
parent08ffe9c541850c7bc0716fe6cf8461448e9da8af (diff)
Revert "radeon/winsys: pad IBs to a multiple of 8 DWs"mesa-9.1.7
This reverts commit 4a8d1c5ef2f9c57a3c2feb829be3534ac43b9077. This commit causes compilation failures ("'SI' undeclared"), which, embarrassingly enough, I failed to notice earlier.
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c30
1 files changed, 0 insertions, 30 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 007d1290114..6a7115ba76b 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -455,36 +455,6 @@ static void radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, unsigned flags)
struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
struct radeon_cs_context *tmp;
- switch (cs->base.ring_type) {
- case RING_DMA:
- /* pad DMA ring to 8 DWs */
- if (cs->ws->info.chip_class <= SI) {
- while (rcs->cdw & 7)
- OUT_CS(&cs->base, 0xf0000000); /* NOP packet */
- } else {
- while (rcs->cdw & 7)
- OUT_CS(&cs->base, 0x00000000); /* NOP packet */
- }
- break;
- case RING_GFX:
- /* pad DMA ring to 8 DWs to meet CP fetch alignment requirements
- * r6xx, requires at least 4 dw alignment to avoid a hw bug.
- */
- if (flags & RADEON_FLUSH_COMPUTE) {
- if (cs->ws->info.chip_class <= SI) {
- while (rcs->cdw & 7)
- OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
- } else {
- while (rcs->cdw & 7)
- OUT_CS(&cs->base, 0xffff1000); /* type3 nop packet */
- }
- } else {
- while (rcs->cdw & 7)
- OUT_CS(&cs->base, 0x80000000); /* type2 nop packet */
- }
- break;
- }
-
if (rcs->cdw > RADEON_MAX_CMDBUF_DWORDS) {
fprintf(stderr, "radeon: command stream overflowed\n");
}