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authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>2020-10-02 15:49:55 -0400
committerEric Engestrom <eric@engestrom.ch>2020-10-14 19:29:33 +0200
commit77ba26fc946738242bcf4afbb9969a70150098a9 (patch)
treeaecb652cdc34ed4b3a89c4b9c1964f03079a0c34
parent3d194ae1e510020bc33116de71a9ccd6ed6c755e (diff)
pan/bi: Handle vector moves
And fix the bad assertion that let this slip. Like combines, nir_op_vec can be vector, and we need to lower this ourselves. Thankfully, the lowering is simple. Fixes dEQP-GLES2.functional.shaders.loops.for_uniform_iterations.nested_tricky_dataflow_1_* Fixes: b2c6cf2b6db ("pan/bi: Eliminate writemasks in the IR") Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081> (cherry picked from commit a204eac75991691d9d55455db2b718fbfa03d81e)
-rw-r--r--.pick_status.json2
-rw-r--r--src/panfrost/bifrost/bifrost_compile.c14
2 files changed, 12 insertions, 4 deletions
diff --git a/.pick_status.json b/.pick_status.json
index b7cc1c9caf1..267c279a911 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -6196,7 +6196,7 @@
"description": "pan/bi: Handle vector moves",
"nominated": true,
"nomination_type": 1,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": "b2c6cf2b6db11eb2293f59b42dfeb3d7481477b0"
},
diff --git a/src/panfrost/bifrost/bifrost_compile.c b/src/panfrost/bifrost/bifrost_compile.c
index 9b35a901ea3..6c52c38340b 100644
--- a/src/panfrost/bifrost/bifrost_compile.c
+++ b/src/panfrost/bifrost/bifrost_compile.c
@@ -570,9 +570,8 @@ emit_alu(bi_context *ctx, nir_alu_instr *instr)
assert((alu.type != BI_SPECIAL) || !(ctx->quirks & BIFROST_NO_FAST_OP));
unsigned comps = nir_dest_num_components(instr->dest.dest);
-
- if (alu.type != BI_COMBINE)
- assert(comps <= MAX2(1, 32 / comps));
+ bool vector = comps > MAX2(1, 32 / nir_dest_bit_size(instr->dest.dest));
+ assert(!vector || alu.type == BI_COMBINE || alu.type == BI_MOV);
if (!instr->dest.dest.is_ssa) {
for (unsigned i = 0; i < comps; ++i)
@@ -668,6 +667,15 @@ emit_alu(bi_context *ctx, nir_alu_instr *instr)
break;
}
+ if (alu.type == BI_MOV && vector) {
+ alu.type = BI_COMBINE;
+
+ for (unsigned i = 0; i < comps; ++i) {
+ alu.src[i] = alu.src[0];
+ alu.swizzle[i][0] = instr->src[0].swizzle[i];
+ }
+ }
+
if (alu.type == BI_CSEL) {
/* Default to csel3 */
alu.cond = BI_COND_NE;