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authorRafael Antognolli <rafael.antognolli@intel.com>2020-03-03 08:07:32 -0800
committerEric Engestrom <eric@engestrom.ch>2020-03-06 22:59:38 +0100
commit5947cf61d2d393c1036891ec54fd2ce2e72d64b8 (patch)
tree65c4b14b0223d1c7b7f1464539b066ab8070a1a4
parentcb526cc1c64853cfc4dfa990f854ff80777f3796 (diff)
intel/gen12+: Disable mid thread preemption.
Fixes a GPU hang in Car Chase. Cc: mesa-stable@lists.freedesktop.org v2: Add comment explaining why (Jason). Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4035> (cherry picked from commit 5f13996262a6d72ca5b5c235647d5257ae961b66)
-rw-r--r--.pick_status.json2
-rw-r--r--src/gallium/drivers/iris/iris_state.c12
-rw-r--r--src/intel/genxml/gen12.xml1
-rw-r--r--src/intel/vulkan/genX_pipeline.c12
4 files changed, 26 insertions, 1 deletions
diff --git a/.pick_status.json b/.pick_status.json
index 44af0a40d4b..241ed9ff4f2 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1408,7 +1408,7 @@
"description": "intel/gen12+: Disable mid thread preemption.",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 1c5e21f993f..3869f38366c 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -4304,6 +4304,18 @@ iris_store_cs_state(struct iris_context *ice,
desc.BarrierEnable = cs_prog_data->uses_barrier;
desc.CrossThreadConstantDataReadLength =
cs_prog_data->push.cross_thread.regs;
+#if GEN_GEN >= 12
+ /* TODO: Check if we are missing workarounds and enable mid-thread
+ * preemption.
+ *
+ * We still have issues with mid-thread preemption (it was already
+ * disabled by the kernel on gen11, due to missing workarounds). It's
+ * possible that we are just missing some workarounds, and could enable
+ * it later, but for now let's disable it to fix a GPU in compute in Car
+ * Chase (and possibly more).
+ */
+ desc.ThreadPreemptionDisable = true;
+#endif
}
}
diff --git a/src/intel/genxml/gen12.xml b/src/intel/genxml/gen12.xml
index ce6aff4fde3..a6881846c89 100644
--- a/src/intel/genxml/gen12.xml
+++ b/src/intel/genxml/gen12.xml
@@ -520,6 +520,7 @@
<value name="Ftz" value="0"/>
<value name="SetByKernel" value="1"/>
</field>
+ <field name="Thread Preemption Disable" start="84" end="84" type="bool"/>
<field name="Sampler Count" start="98" end="100" type="uint">
<value name="No samplers used" value="0"/>
<value name="Between 1 and 4 samplers used" value="1"/>
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 464a684f0d4..db33ed2f496 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -2369,6 +2369,18 @@ compute_pipeline_create(
.CrossThreadConstantDataReadLength =
cs_prog_data->push.cross_thread.regs,
#endif
+#if GEN_GEN >= 12
+ /* TODO: Check if we are missing workarounds and enable mid-thread
+ * preemption.
+ *
+ * We still have issues with mid-thread preemption (it was already
+ * disabled by the kernel on gen11, due to missing workarounds). It's
+ * possible that we are just missing some workarounds, and could enable
+ * it later, but for now let's disable it to fix a GPU in compute in Car
+ * Chase (and possibly more).
+ */
+ .ThreadPreemptionDisable = true,
+#endif
.NumberofThreadsinGPGPUThreadGroup = cs_prog_data->threads,
};