diff options
author | Kenneth Graunke <kenneth@whitecape.org> | 2019-08-22 17:32:25 -0700 |
---|---|---|
committer | Juan A. Suarez Romero <jasuarez@igalia.com> | 2019-10-02 09:41:27 -0400 |
commit | b977c7444c77f70863d7f35f064f6b5789152347 (patch) | |
tree | 84be4a5ea56651970abb3ba295d963e394ec5089 | |
parent | c94e5e3ee13a7e5657d3074722137e6ff92119d9 (diff) |
intel: Increase Gen11 compute shader scratch IDs to 64.
From the MEDIA_VFE_STATE docs:
"Starting with this configuration, the Maximum Number of Threads must
be set to (#EU * 8) for GPGPU dispatches.
Although there are only 7 threads per EU in the configuration, the
FFTID is calculated as if there are 8 threads per EU, which in turn
requires a larger amount of Scratch Space to be allocated by the
driver."
It's pretty clear that we need to increase this for scratch address
calculations, because the FFTID has a certain bit-pattern. The quote
above seems to indicate that we should increase the actual thread count
programmed in MEDIA_VFE_STATE as well, but we think the intention is to
only bump the scratch space.
Fixes GPU hangs in Bioshock Infinite and Synmark's CSDof on Icelake 8x8.
Fixes: 5ac804bd9ac ("intel: Add a preliminary device for Ice Lake")
Reviewed-by: Matt Turner <mattst88@gmail.com>
(cherry picked from commit b9e93db20896a436c716107dd0d12057b3aa9f72)
-rw-r--r-- | src/gallium/drivers/iris/iris_program.c | 15 | ||||
-rw-r--r-- | src/intel/vulkan/anv_allocator.c | 14 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_program.c | 14 |
3 files changed, 41 insertions, 2 deletions
diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index 7512889c47b..fee50f2600d 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -1430,6 +1430,21 @@ iris_get_scratch_space(struct iris_context *ice, if (!*bop) { unsigned scratch_ids_per_subslice = devinfo->max_cs_threads; + + if (devinfo->gen >= 11) { + /* The MEDIA_VFE_STATE docs say: + * + * "Starting with this configuration, the Maximum Number of + * Threads must be set to (#EU * 8) for GPGPU dispatches. + * + * Although there are only 7 threads per EU in the configuration, + * the FFTID is calculated as if there are 8 threads per EU, + * which in turn requires a larger amount of Scratch Space to be + * allocated by the driver." + */ + scratch_ids_per_subslice = 8 * 8; + } + uint32_t max_threads[] = { [MESA_SHADER_VERTEX] = devinfo->max_vs_threads, [MESA_SHADER_TESS_CTRL] = devinfo->max_tcs_threads, diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c index 48d41891cfb..9334f08909d 100644 --- a/src/intel/vulkan/anv_allocator.c +++ b/src/intel/vulkan/anv_allocator.c @@ -1532,7 +1532,19 @@ anv_scratch_pool_alloc(struct anv_device *device, struct anv_scratch_pool *pool, const unsigned subslices = MAX2(physical_device->subslice_total, 1); unsigned scratch_ids_per_subslice; - if (devinfo->is_haswell) { + if (devinfo->gen >= 11) { + /* The MEDIA_VFE_STATE docs say: + * + * "Starting with this configuration, the Maximum Number of + * Threads must be set to (#EU * 8) for GPGPU dispatches. + * + * Although there are only 7 threads per EU in the configuration, + * the FFTID is calculated as if there are 8 threads per EU, + * which in turn requires a larger amount of Scratch Space to be + * allocated by the driver." + */ + scratch_ids_per_subslice = 8 * 8; + } else if (devinfo->is_haswell) { /* WaCSScratchSize:hsw * * Haswell's scratch space address calculation appears to be sparse diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index defb465a2e2..64d72c671e0 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -435,7 +435,19 @@ brw_alloc_stage_scratch(struct brw_context *brw, subslices = 4 * brw->screen->devinfo.num_slices; unsigned scratch_ids_per_subslice; - if (devinfo->is_haswell) { + if (devinfo->gen >= 11) { + /* The MEDIA_VFE_STATE docs say: + * + * "Starting with this configuration, the Maximum Number of + * Threads must be set to (#EU * 8) for GPGPU dispatches. + * + * Although there are only 7 threads per EU in the configuration, + * the FFTID is calculated as if there are 8 threads per EU, + * which in turn requires a larger amount of Scratch Space to be + * allocated by the driver." + */ + scratch_ids_per_subslice = 8 * 8; + } else if (devinfo->is_haswell) { /* WaCSScratchSize:hsw * * Haswell's scratch space address calculation appears to be sparse |