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authorChih-Wei Huang <cwhuang@linux.org.tw>2010-11-10 10:28:12 +0800
committerChia-I Wu <olvaffe@gmail.com>2010-12-09 20:01:35 -0500
commit6269411b816b441e17545f60a6442362ba6599d0 (patch)
tree1be251021b0d819fa30951acde8b6bdedbfb8e6a
parent88721c8555e1c65cdb1fa57f50e588d169e77915 (diff)
android: enable support of i965c
-rw-r--r--src/Android.mk10
-rw-r--r--src/mesa/drivers/Android.mk136
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_pass2.c2
3 files changed, 147 insertions, 1 deletions
diff --git a/src/Android.mk b/src/Android.mk
index ea0ff8988a9..66f2f913121 100644
--- a/src/Android.mk
+++ b/src/Android.mk
@@ -24,6 +24,7 @@ MESA_BUILD_I915G := false
# for testing purpose
#BOARD_USES_I915C := true
#BOARD_USES_I915G := true
+#BOARD_USES_I965C := true
#BOARD_USES_VMWGFX := true
MESA_GRALLOC_NAME :=
@@ -47,6 +48,15 @@ MESA_GRALLOC_NAME := i915
MESA_GLES_NAME := i915g
endif
+ifeq ($(strip $(BOARD_USES_I965C)),true)
+MESA_BUILD_CLASSIC := true
+MESA_BUILD_I915 := true
+MESA_BUILD_I965C := true
+
+MESA_GRALLOC_NAME := i915
+MESA_GLES_NAME := i965c
+endif
+
ifeq ($(strip $(BOARD_USES_VMWGFX)),true)
MESA_BUILD_GALLIUM := true
MESA_BUILD_SWRAST := true
diff --git a/src/mesa/drivers/Android.mk b/src/mesa/drivers/Android.mk
index 219eacc2281..28f5beb5f7a 100644
--- a/src/mesa/drivers/Android.mk
+++ b/src/mesa/drivers/Android.mk
@@ -59,6 +59,110 @@ i915_DRIVER_SOURCES = \
intel_fbo.c
i915_DRIVER_SOURCES := $(addprefix dri/i915/, $(i915_DRIVER_SOURCES))
+i965_DRIVER_SOURCES = \
+ intel_batchbuffer.c \
+ intel_blit.c \
+ intel_buffer_objects.c \
+ intel_buffers.c \
+ intel_clear.c \
+ intel_context.c \
+ intel_decode.c \
+ intel_extensions.c \
+ intel_extensions_es2.c \
+ intel_fbo.c \
+ intel_mipmap_tree.c \
+ intel_regions.c \
+ intel_screen.c \
+ intel_span.c \
+ intel_pixel.c \
+ intel_pixel_bitmap.c \
+ intel_pixel_copy.c \
+ intel_pixel_draw.c \
+ intel_pixel_read.c \
+ intel_state.c \
+ intel_syncobj.c \
+ intel_tex.c \
+ intel_tex_copy.c \
+ intel_tex_format.c \
+ intel_tex_image.c \
+ intel_tex_layout.c \
+ intel_tex_subimage.c \
+ intel_tex_validate.c \
+ brw_cc.c \
+ brw_clip.c \
+ brw_clip_line.c \
+ brw_clip_point.c \
+ brw_clip_state.c \
+ brw_clip_tri.c \
+ brw_clip_unfilled.c \
+ brw_clip_util.c \
+ brw_context.c \
+ brw_curbe.c \
+ brw_disasm.c \
+ brw_draw.c \
+ brw_draw_upload.c \
+ brw_eu.c \
+ brw_eu_debug.c \
+ brw_eu_emit.c \
+ brw_eu_util.c \
+ brw_fallback.c \
+ brw_gs.c \
+ brw_gs_emit.c \
+ brw_gs_state.c \
+ brw_misc_state.c \
+ brw_optimize.c \
+ brw_program.c \
+ brw_queryobj.c \
+ brw_sf.c \
+ brw_sf_emit.c \
+ brw_sf_state.c \
+ brw_state.c \
+ brw_state_batch.c \
+ brw_state_cache.c \
+ brw_state_dump.c \
+ brw_state_upload.c \
+ brw_tex.c \
+ brw_tex_layout.c \
+ brw_urb.c \
+ brw_util.c \
+ brw_vs.c \
+ brw_vs_constval.c \
+ brw_vs_emit.c \
+ brw_vs_state.c \
+ brw_vs_surface_state.c \
+ brw_vtbl.c \
+ brw_wm.c \
+ brw_wm_debug.c \
+ brw_wm_emit.c \
+ brw_wm_fp.c \
+ brw_wm_iz.c \
+ brw_wm_pass0.c \
+ brw_wm_pass1.c \
+ brw_wm_pass2.c \
+ brw_wm_sampler_state.c \
+ brw_wm_state.c \
+ brw_wm_surface_state.c \
+ gen6_cc.c \
+ gen6_clip_state.c \
+ gen6_depthstencil.c \
+ gen6_gs_state.c \
+ gen6_sampler_state.c \
+ gen6_scissor_state.c \
+ gen6_sf_state.c \
+ gen6_urb.c \
+ gen6_viewport_state.c \
+ gen6_vs_state.c \
+ gen6_wm_state.c
+i965_CXX_SOURCES = \
+ brw_cubemap_normalize.cpp \
+ brw_fs.cpp \
+ brw_fs_channel_expressions.cpp \
+ brw_fs_reg_allocate.cpp \
+ brw_fs_vector_splitting.cpp
+i965_DRIVER_SOURCES := \
+ $(addprefix dri/i965/, $(i965_DRIVER_SOURCES)) \
+ $(addprefix dri/i965/, $(i965_CXX_SOURCES))
+
common_CFLAGS := \
-DPTHREADS \
-DFEATURE_GL=1 \
@@ -127,3 +231,35 @@ LOCAL_MODULE := libGLES_i915c
include $(BUILD_SHARED_LIBRARY)
endif # MESA_BUILD_I915C
+
+ifeq ($(strip $(MESA_BUILD_I965C)),true)
+include $(CLEAR_VARS)
+
+LOCAL_SRC_FILES := \
+ $(COMMON_SOURCES) \
+ $(i965_DRIVER_SOURCES)
+
+LOCAL_CFLAGS := \
+ $(common_CFLAGS) \
+ -DI965
+
+LOCAL_C_INCLUDES := \
+ $(common_C_INCLUDES) \
+ external/mesa/src/mesa/drivers/dri/intel \
+ external/drm/intel
+
+LOCAL_STATIC_LIBRARIES := \
+ $(common_STATIC_LIBRARIES)
+
+LOCAL_WHOLE_STATIC_LIBRARIES := \
+ $(common_WHOLE_STATIC_LIBRARIES)
+
+LOCAL_SHARED_LIBRARIES := \
+ $(common_SHARED_LIBRARIES) \
+ libdrm_intel
+
+LOCAL_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/egl
+LOCAL_MODULE := libGLES_i965c
+
+include $(BUILD_SHARED_LIBRARY)
+endif # MESA_BUILD_I965C
diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
index 8c2b9e7020b..b55c354101b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c
@@ -85,7 +85,7 @@ static void init_registers( struct brw_wm_compile *c )
prealloc_reg(c, &c->creg[j], i++);
if (intel->gen >= 6) {
- for (unsigned int j = 0; j < FRAG_ATTRIB_MAX; j++) {
+ for (j = 0; j < FRAG_ATTRIB_MAX; j++) {
if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(j)) {
nr_interp_regs++;
prealloc_reg(c, &c->payload.input_interp[j], i++);