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authorNicolai Hähnle <nicolai.haehnle@amd.com>2016-06-14 18:00:13 +0200
committerEmil Velikov <emil.l.velikov@gmail.com>2016-06-15 09:29:14 +0100
commit575f9eaa2d0c8de0bc701b8e928dbf132013388c (patch)
treef4c3ce211bc78d37ab5ccb91a33324d240f2df87
parent792a5ee42573e23e199798f488f6daf53c3a95b1 (diff)
radeonsi: mark buffer texture range valid for shader images
When a shader image view into a buffer texture can be written to, the buffer's valid range must be updated, or subsequent transfers may incorrectly skip synchronization. This fixes a bug that was exposed in Xephyr by PBO acceleration for glReadPixels, reported by Michel Dänzer. Cc: Michel Dänzer <michel.daenzer@amd.com> Cc: 12.0 <mesa-stable@lists.freedesktop.org> Reviewed-by: Marek Olšák <marek.olsak@amd.com> (cherry picked from commit a64c7cd2bac33a3a2bf908b5ef538dff03b93b73) Back-ported from commit a64c7cd2bac33a3a2bf908b5ef538dff03b93b73: - include util/u_format.h - code was extracted to si_set_shader_image in master, move it back Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> -- src/gallium/drivers/radeonsi/si_descriptors.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 57d2ae60a6d..bbd02e9980f 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -60,6 +60,7 @@
#include "si_shader.h"
#include "sid.h"
+#include "util/u_format.h"
#include "util/u_math.h"
#include "util/u_memory.h"
#include "util/u_suballoc.h"
@@ -482,6 +483,23 @@ si_disable_shader_image(struct si_images_info *images, unsigned slot)
}
static void
+si_mark_image_range_valid(struct pipe_image_view *view)
+{
+ struct r600_resource *res = (struct r600_resource *)view->resource;
+ const struct util_format_description *desc;
+ unsigned stride;
+
+ assert(res && res->b.b.target == PIPE_BUFFER);
+
+ desc = util_format_description(view->format);
+ stride = desc->block.bits / 8;
+
+ util_range_add(&res->valid_buffer_range,
+ stride * (view->u.buf.first_element),
+ stride * (view->u.buf.last_element + 1));
+}
+
+static void
si_set_shader_images(struct pipe_context *pipe, unsigned shader,
unsigned start_slot, unsigned count,
struct pipe_image_view *views)
@@ -513,6 +531,9 @@ si_set_shader_images(struct pipe_context *pipe, unsigned shader,
RADEON_USAGE_READWRITE);
if (res->b.b.target == PIPE_BUFFER) {
+ if (views[i].access & PIPE_IMAGE_ACCESS_WRITE)
+ si_mark_image_range_valid(&views[i]);
+
si_make_buffer_descriptor(screen, res,
views[i].format,
views[i].u.buf.first_element,
@@ -1309,6 +1330,9 @@ static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource
unsigned i = u_bit_scan(&mask);
if (images->views[i].resource == buf) {
+ if (images->views[i].access & PIPE_IMAGE_ACCESS_WRITE)
+ si_mark_image_range_valid(&images->views[i]);
+
si_desc_reset_buffer_offset(
ctx, images->desc.list + i * 8 + 4,
old_va, buf);