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authorMarek Olšák <marek.olsak@amd.com>2018-05-01 20:16:19 -0400
committerDylan Baker <dylan@pnwbakers.com>2018-05-11 08:35:06 -0700
commit1def4eaa5c29a7b25d626a37d55f1541273cf336 (patch)
tree09974932a1da3047965e192d8b249c59d9b71041
parent421aedcc5932d2dc23fb18b721d1bbb2180c02d2 (diff)
radeonsi/gfx9: work around a GPU hang due to broken indirect indexing in LLVM
Fixes: 6d19120da85 "radeonsi/gfx9: workaround for INTERP with indirect indexing" Cc: 18.1 <mesa-stable@lists.freedesktop.org> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (cherry picked from commit 597b9e881083533b987dbcbb8f679ca1eefff974)
-rw-r--r--src/gallium/drivers/radeonsi/si_get.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 04ab0f46bbd..6bfbc4d0c45 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -484,6 +484,15 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
!sscreen->llvm_has_working_vgpr_indexing)
return 0;
+ /* Doing indirect indexing on GFX9 with LLVM 6.0 hangs.
+ * This means we don't support INTERP instructions with
+ * indirect indexing on inputs.
+ */
+ if (shader == PIPE_SHADER_FRAGMENT &&
+ !sscreen->llvm_has_working_vgpr_indexing &&
+ HAVE_LLVM < 0x0700)
+ return 0;
+
/* TCS and TES load inputs directly from LDS or offchip
* memory, so indirect indexing is always supported.
* PS has to support indirect indexing, because we can't