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authorChristian König <christian.koenig@amd.com>2013-04-12 17:13:41 +0200
committerChristian König <christian.koenig@amd.com>2013-04-16 22:36:51 +0200
commit13ddf9baf27e4c460df83a033ad618d65b61ab8f (patch)
tree87e4eef96da7ea021ef6a90cd5e3e385505cbf34
parent7490eeb3d624a7ee4de9c5f53549eddb7978f64a (diff)
r600/uvd: cleanup disabling tiling on pre EG asics
Set transfer flag instead of fiddling with the tilling params directly. Signed-off-by: Christian König <christian.koenig@amd.com>
-rw-r--r--src/gallium/drivers/r600/r600_uvd.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/gallium/drivers/r600/r600_uvd.c b/src/gallium/drivers/r600/r600_uvd.c
index bdda7e148c6..dafddfa27a8 100644
--- a/src/gallium/drivers/r600/r600_uvd.c
+++ b/src/gallium/drivers/r600/r600_uvd.c
@@ -76,6 +76,8 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
template.height = align(tmpl->height / depth, VL_MACROBLOCK_HEIGHT);
vl_vide_buffer_template(&templ, &template, resource_formats[0], depth, PIPE_USAGE_STATIC, 0);
+ if (ctx->chip_class < EVERGREEN)
+ templ.flags = R600_RESOURCE_FLAG_TRANSFER;
resources[0] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, &templ);
if (!resources[0])
@@ -83,6 +85,8 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
if (resource_formats[1] != PIPE_FORMAT_NONE) {
vl_vide_buffer_template(&templ, &template, resource_formats[1], depth, PIPE_USAGE_STATIC, 1);
+ if (ctx->chip_class < EVERGREEN)
+ templ.flags = R600_RESOURCE_FLAG_TRANSFER;
resources[1] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, &templ);
if (!resources[1])
@@ -91,6 +95,8 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
if (resource_formats[2] != PIPE_FORMAT_NONE) {
vl_vide_buffer_template(&templ, &template, resource_formats[2], depth, PIPE_USAGE_STATIC, 2);
+ if (ctx->chip_class < EVERGREEN)
+ templ.flags = R600_RESOURCE_FLAG_TRANSFER;
resources[2] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, &templ);
if (!resources[2])
@@ -103,11 +109,6 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
pbs[i] = &resources[i]->resource.buf;
surfaces[i] = &resources[i]->surface;
-
- if (ctx->chip_class < EVERGREEN) {
- resources[i]->array_mode[0] = V_038000_ARRAY_LINEAR_ALIGNED;
- resources[i]->surface.level[0].mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
- }
}
ruvd_join_surfaces(ctx->ws, templ.bind, pbs, surfaces);