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2014-05-19assembler: distinguish the channel of .z from the condition of .zXiang, Haihao1-0/+45
2014-05-19assembler: switch the order of swizzle and regtype to match the BNF of the as...Xiang, Haihao1-3/+3
2014-02-13Assembler/bdw: Remove the unsupported cache agent for WRITE(...)Zhao Yakui1-4/+0
2014-02-11assembler: fix condition for printing a warningThomas Wood1-1/+1
2014-02-06assembler: define YY_NO_INPUT to prevent unused symbol warningsThomas Wood1-0/+1
2013-12-06assembler/bdw: Update write(...)Xiang, Haihao1-2/+28
2013-11-06assembler/bdw: Add the DATA_PORT_CACHE1 shared function for Gen8+Zhao Yakui2-1/+3
2013-11-06assembler/bdw: Add the support of align1 register-indirect addressing mode on...Zhao Yakui3-15/+101
2013-11-06assembler/bdw: SEND instructionXiang, Haihao1-4/+15
2013-11-06assembler/bdw: Small cleanupBen Widawsky1-3/+1
2013-11-06assembler/bdw: Check & Refinement Engine messageXiang, Haihao2-7/+22
2013-11-06assembler/bdw: Video Motion Estimation(VME) messageXiang, Haihao2-1/+14
2013-11-06assembler/bdw: Thread Spawn messageXiang, Haihao2-12/+29
2013-11-06assembler/bdw: Data port messageXiang, Haihao2-32/+80
2013-11-06assembler/bdw: Set thread switch for multiple branch instructionsXiang, Haihao1-2/+8
2013-11-06assembler/bdw: Set jip/uip offsets used by flow control instructionsXiang, Haihao2-47/+88
2013-11-06assembler/bdw: Disable mask control for advanced modeXiang, Haihao1-2/+6
2013-11-06assembler/bdw: Set math functionXiang, Haihao1-1/+6
2013-11-06assembler/bdw: Use gen8_set_exec_size() to set the execution sizeDamien Lespiau1-5/+13
2013-11-06assembler/bdw: Preliminary gen8 send & msgtarget supportDamien Lespiau1-6/+28
2013-11-06assembler/bdw: Add the start of a gen8 disassemblerDamien Lespiau3-3/+1002
2013-11-06assembler/bdw: Make the validation functions take a brw_program_instructionDamien Lespiau1-10/+26
2013-11-06assembler/bdw: Support some basic gen8 intructionsDamien Lespiau2-8/+60
2013-11-06assembler/bdw: Add gen8_instruction from mesaDamien Lespiau5-2/+681
2013-11-04Update .gitignore a bitDaniel Vetter1-4/+5
2013-08-20assembler: Disable the declare testDamien Lespiau1-1/+1
2013-08-20assembler: Disable tests that where already failing in the gen4asm repoDamien Lespiau1-5/+13
2013-08-20assembler: Ignore make check outputDamien Lespiau1-0/+3
2013-08-20assembler: Fix the path of intel-gen4asmDamien Lespiau1-1/+1
2013-08-20assembler: Revert "Fix missing environment variables problem in test/run-test...Damien Lespiau1-7/+5
2013-08-20assembler: Revert "Automatically run all test cases."Damien Lespiau2-80/+11
2013-08-20assembler: Tune the error message for invalid send on gen6+Damien Lespiau1-6/+6
2013-08-15assembler: error for the wrong syntax of SEND instruction on GEN6+Xiang, Haihao1-0/+12
2013-05-22assembler: Add support for the SENDC instruction.Matt Turner2-8/+13
2013-03-04assembler: Mark format() as PRINTFLIKE in the disassemblerDamien Lespiau1-0/+2
2013-03-04assembler: Fix the decoding of the destination horizontal strideDamien Lespiau1-2/+2
2013-03-04assembler: Group the header inclusions togetherDamien Lespiau1-3/+2
2013-03-04assembler: Don't use GL typesDamien Lespiau8-1070/+1058
2013-03-04assembler: Remove trailing white spaceDamien Lespiau7-55/+55
2013-03-04assembler: Use defines for widthDamien Lespiau1-11/+11
2013-03-04assembler: Merge declared_register's type into the reg structureDamien Lespiau2-8/+5
2013-03-04assembler: Finish importing brw_eu_*c from mesaDamien Lespiau3-0/+219
2013-03-04assembler: Use set_instruction_src1() in sendDamien Lespiau1-11/+6
2013-03-04assembler: Put struct opcode_desc back in brw_context.hDamien Lespiau3-19/+23
2013-03-04assembler: Don't pollute the library files with gen4asm.hDamien Lespiau4-3/+8
2013-03-04assembler: Use brw_*() functions for 3-src instructionsDamien Lespiau1-51/+28
2013-03-04assembler: Add support for D and UD in 3-src instructionsDamien Lespiau2-4/+24
2013-03-04assembler: Expose setters for 3src operandsDamien Lespiau2-8/+52
2013-03-04assembler: Introduce set_instruction_saturate()Damien Lespiau1-12/+14
2013-03-04assembler: Introduce set_intruction_pred_cond()Damien Lespiau1-57/+31