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authorChris Wilson <chris@chris-wilson.co.uk>2020-07-06 13:01:48 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2020-07-26 23:31:12 +0100
commit4a6dcd837e9e742c139dfbdfd50a0134a2c8cae3 (patch)
tree5bda2177dd8142aacdeafda73f5c7b64be0f38ff /tools/intel_l3_parity.c
parent3efebcb90417c294d1b2041e590e2b146670dec4 (diff)
tools: Use the gt number stored in the device info
Don't use the encoded information within the PCI-ID for the GT value, as the rules keep changing. Use the device info instead. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Diffstat (limited to 'tools/intel_l3_parity.c')
-rw-r--r--tools/intel_l3_parity.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/tools/intel_l3_parity.c b/tools/intel_l3_parity.c
index 340f94b1..484dd028 100644
--- a/tools/intel_l3_parity.c
+++ b/tools/intel_l3_parity.c
@@ -44,10 +44,11 @@
#include "intel_l3_parity.h"
static unsigned int devid;
+
/* L3 size is always a function of banks. The number of banks cannot be
* determined by number of slices however */
static inline int num_banks(void) {
- switch (intel_gt(devid)) {
+ switch (intel_get_device_info(devid)->gt) {
case 2: return 8;
case 1: return 4;
default: return 2;
@@ -61,7 +62,7 @@ static inline int num_banks(void) {
#define MAX_ROW (1<<12)
#define MAX_BANKS_PER_SLICE 4
#define NUM_REGS (MAX_BANKS_PER_SLICE * NUM_SUBBANKS)
-#define MAX_SLICES (intel_gt(devid) > 1 ? 2 : 1)
+#define MAX_SLICES (intel_get_device_info(devid)->gt > 1 ? 2 : 1)
#define REAL_MAX_SLICES 2
/* TODO support SLM config */
#define L3_SIZE ((MAX_ROW * 4) * NUM_SUBBANKS * num_banks())