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authorAdam Miszczak <adam.miszczak@linux.intel.com>2020-08-12 11:05:48 +0200
committerPetri Latvala <petri.latvala@intel.com>2020-08-13 11:06:16 +0300
commit4e5f76be680b65780204668e302026cf638decc9 (patch)
treeee6aba1dc4a24b94df14e3de05984952433006b1
parentf421e67302ce9e1071b654eb122b3a19af9d7d4d (diff)
lib/i915: Add DG1 platform definition
Signed-off-by: Adam Miszczak <adam.miszczak@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Petri Latvala <petri.latvala@intel.com> Reviewed-by: Petri Latvala <petri.latvala@intel.com>
-rw-r--r--lib/intel_chipset.h2
-rw-r--r--lib/intel_device_info.c8
2 files changed, 10 insertions, 0 deletions
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 18f860ca..51093091 100644
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -74,6 +74,7 @@ struct intel_device_info {
bool is_elkhartlake : 1;
bool is_tigerlake : 1;
bool is_rocketlake : 1;
+ bool is_dg1 : 1;
const char *codename;
};
@@ -173,6 +174,7 @@ void intel_check_pch(void);
#define IS_ICELAKE(devid) (intel_get_device_info(devid)->is_icelake)
#define IS_TIGERLAKE(devid) (intel_get_device_info(devid)->is_tigerlake)
#define IS_ROCKETLAKE(devid) (intel_get_device_info(devid)->is_rocketlake)
+#define IS_DG1(devid) (intel_get_device_info(devid)->is_dg1)
#define IS_GEN(devid, x) (intel_get_device_info(devid)->gen & (1u << ((x)-1)))
#define AT_LEAST_GEN(devid, x) (intel_get_device_info(devid)->gen & -(1u << ((x)-1)))
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index e5720443..d5f70156 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -327,6 +327,12 @@ static const struct intel_device_info intel_rocketlake_info = {
.codename = "rocketlake"
};
+static const struct intel_device_info intel_dg1_info = {
+ .gen = BIT(11),
+ .is_dg1 = true,
+ .codename = "dg1"
+};
+
static const struct pci_id_match intel_device_match[] = {
INTEL_I810_IDS(&intel_i810_info),
INTEL_I815_IDS(&intel_i815_info),
@@ -413,6 +419,8 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_TGL_12_IDS(&intel_tigerlake_info),
INTEL_RKL_IDS(&intel_rocketlake_info),
+ INTEL_DG1_IDS(&intel_dg1_info),
+
INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info),
};