i915/gem_partial_pwrite_pread: Remove libdrm dependency

Eliminate libdrm references - use new intel_bb implmementation instead.

Signed-off-by: Adam Miszczak <adam.miszczak@intel.com>
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

1 files changed, 101 insertions, 67 deletions

diff --git a/tests/i915/gem_partial_pwrite_pread.c b/tests/i915/gem_partial_pwrite_pread.c
index 277a73905..b4bae9b6d 100644
--- a/tests/i915/gem_partial_pwrite_pread.c
+++ b/tests/i915/gem_partial_pwrite_pread.c
@@ -50,48 +50,79 @@ IGT_TEST_DESCRIPTION("Test pwrite/pread consistency when touching partial"
  *
  */
 
-static drm_intel_bufmgr *bufmgr;
-struct intel_batchbuffer *batch;
-
-drm_intel_bo *scratch_bo;
-drm_intel_bo *staging_bo;
+#define PAGE_SIZE 4096
 #define BO_SIZE (4*4096)
-uint32_t devid;
-int fd;
 
-static void
-copy_bo(drm_intel_bo *src, drm_intel_bo *dst)
+struct intel_bb *ibb;
+struct intel_buf *scratch_buf;
+struct intel_buf *staging_buf;
+
+typedef struct {
+	int drm_fd;
+	uint32_t devid;
+	struct buf_ops *bops;
+} data_t;
+
+static void *__try_gtt_map_first(data_t *data, struct intel_buf *buf,
+				int write_enable)
+{
+	uint8_t *ptr;
+	unsigned prot = PROT_READ | (write_enable ? PROT_WRITE : 0);
+
+	ptr = __gem_mmap__gtt(data->drm_fd, buf->handle, buf->surface[0].size, prot);
+	if (!ptr) {
+		ptr = gem_mmap__device_coherent(data->drm_fd, buf->handle,
+					  0, buf->surface[0].size,  prot);
+	}
+	return ptr;
+}
+
+static void copy_bo(struct intel_buf *src, struct intel_buf *dst)
 {
-	BLIT_COPY_BATCH_START(0);
-	OUT_BATCH((3 << 24) | /* 32 bits */
-		  (0xcc << 16) | /* copy ROP */
-		  4096);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH((BO_SIZE/4096) << 16 | 1024);
-	OUT_RELOC_FENCED(dst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(0 << 16 | 0);
-	OUT_BATCH(4096);
-	OUT_RELOC_FENCED(src, I915_GEM_DOMAIN_RENDER, 0, 0);
-	ADVANCE_BATCH();
-
-	intel_batchbuffer_flush(batch);
+	bool has_64b_reloc;
+
+	has_64b_reloc = ibb->gen >= 8;
+
+	intel_bb_out(ibb,
+		     XY_SRC_COPY_BLT_CMD |
+		     XY_SRC_COPY_BLT_WRITE_ALPHA |
+		     XY_SRC_COPY_BLT_WRITE_RGB |
+		     (6 + 2 * has_64b_reloc));
+	intel_bb_out(ibb, 3 << 24 | 0xcc << 16 | 4096);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, (BO_SIZE/4096) << 16 | 1024);
+	intel_bb_emit_reloc_fenced(ibb, dst->handle,
+				   I915_GEM_DOMAIN_RENDER,
+				   I915_GEM_DOMAIN_RENDER,
+				   0, 0x0);
+	intel_bb_out(ibb, 0 << 16 | 0);
+	intel_bb_out(ibb, 4096);
+	intel_bb_emit_reloc_fenced(ibb, src->handle,
+				   I915_GEM_DOMAIN_RENDER,
+				   0, 0, 0x0);
+
+	intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+	intel_bb_ptr_align(ibb, 8);
+
+	intel_bb_flush_blit(ibb);
+	intel_bb_sync(ibb);
 }
 
 static void
-blt_bo_fill(drm_intel_bo *tmp_bo, drm_intel_bo *bo, uint8_t val)
+blt_bo_fill(data_t *data, struct intel_buf *tmp_bo,
+		struct intel_buf *bo, uint8_t val)
 {
 	uint8_t *gtt_ptr;
 	int i;
 
-	do_or_die(drm_intel_gem_bo_map_gtt(tmp_bo));
-	gtt_ptr = tmp_bo->virtual;
+	gtt_ptr = __try_gtt_map_first(data, tmp_bo, 1);
 
 	for (i = 0; i < BO_SIZE; i++)
 		gtt_ptr[i] = val;
 
-	drm_intel_gem_bo_unmap_gtt(tmp_bo);
+	munmap(gtt_ptr, tmp_bo->surface[0].size);
 
-	igt_drop_caches_set(fd, DROP_BOUND);
+	igt_drop_caches_set(data->drm_fd, DROP_BOUND);
 
 	copy_bo(tmp_bo, bo);
 }
@@ -106,7 +137,7 @@ static void get_range(int *start, int *len)
 	*len = random() % (BO_SIZE - *start - 1) + 1;
 }
 
-static void test_partial_reads(void)
+static void test_partial_reads(data_t *data)
 {
 	int i, j;
 
@@ -115,10 +146,11 @@ static void test_partial_reads(void)
 		uint8_t val = i;
 		int start, len;
 
-		blt_bo_fill(staging_bo, scratch_bo, val);
+		blt_bo_fill(data, staging_buf, scratch_buf, val);
 
 		get_range(&start, &len);
-		do_or_die(drm_intel_bo_get_subdata(scratch_bo, start, len, tmp));
+		gem_read(data->drm_fd, scratch_buf->handle, start, tmp, len);
+
 		for (j = 0; j < len; j++) {
 			igt_assert_f(tmp[j] == val,
 				     "mismatch at %i [%i + %i], got: %i, expected: %i\n",
@@ -129,7 +161,7 @@ static void test_partial_reads(void)
 	}
 }
 
-static void test_partial_writes(void)
+static void test_partial_writes(data_t *data)
 {
 	int i, j;
 	uint8_t *gtt_ptr;
@@ -139,16 +171,15 @@ static void test_partial_writes(void)
 		uint8_t val = i;
 		int start, len;
 
-		blt_bo_fill(staging_bo, scratch_bo, val);
+		blt_bo_fill(data, staging_buf, scratch_buf, val);
 
 		memset(tmp, i + 63, BO_SIZE);
 
 		get_range(&start, &len);
-		drm_intel_bo_subdata(scratch_bo, start, len, tmp);
+		gem_write(data->drm_fd, scratch_buf->handle, start, tmp, len);
 
-		copy_bo(scratch_bo, staging_bo);
-		drm_intel_gem_bo_map_gtt(staging_bo);
-		gtt_ptr = staging_bo->virtual;
+		copy_bo(scratch_buf, staging_buf);
+		gtt_ptr = __try_gtt_map_first(data, staging_buf, 0);
 
 		for (j = 0; j < start; j++) {
 			igt_assert_f(gtt_ptr[j] == val,
@@ -165,13 +196,13 @@ static void test_partial_writes(void)
 				     "mismatch at %i (end=%i), got: %i, expected: %i\n",
 				     j, start+len, tmp[j], val);
 		}
-		drm_intel_gem_bo_unmap_gtt(staging_bo);
+		munmap(gtt_ptr, staging_buf->surface[0].size);
 
 		igt_progress("partial writes test: ", i, ROUNDS);
 	}
 }
 
-static void test_partial_read_writes(void)
+static void test_partial_read_writes(data_t *data)
 {
 	int i, j;
 	uint8_t *gtt_ptr;
@@ -181,11 +212,11 @@ static void test_partial_read_writes(void)
 		uint8_t val = i;
 		int start, len;
 
-		blt_bo_fill(staging_bo, scratch_bo, val);
+		blt_bo_fill(data, staging_buf, scratch_buf, val);
 
 		/* partial read */
 		get_range(&start, &len);
-		drm_intel_bo_get_subdata(scratch_bo, start, len, tmp);
+		gem_read(data->drm_fd, scratch_buf->handle, start, tmp, len);
 		for (j = 0; j < len; j++) {
 			igt_assert_f(tmp[j] == val,
 				     "mismatch in read at %i [%i + %i], got: %i, expected: %i\n",
@@ -195,17 +226,16 @@ static void test_partial_read_writes(void)
 		/* Change contents through gtt to make the pread cachelines
 		 * stale. */
 		val += 17;
-		blt_bo_fill(staging_bo, scratch_bo, val);
+		blt_bo_fill(data, staging_buf, scratch_buf, val);
 
 		/* partial write */
 		memset(tmp, i + 63, BO_SIZE);
 
 		get_range(&start, &len);
-		drm_intel_bo_subdata(scratch_bo, start, len, tmp);
+		gem_write(data->drm_fd, scratch_buf->handle, start, tmp, len);
 
-		copy_bo(scratch_bo, staging_bo);
-		do_or_die(drm_intel_gem_bo_map_gtt(staging_bo));
-		gtt_ptr = staging_bo->virtual;
+		copy_bo(scratch_buf, staging_buf);
+		gtt_ptr = __try_gtt_map_first(data, staging_buf, 0);
 
 		for (j = 0; j < start; j++) {
 			igt_assert_f(gtt_ptr[j] == val,
@@ -222,57 +252,61 @@ static void test_partial_read_writes(void)
 				     "mismatch at %i (end=%i), got: %i, expected: %i\n",
 				     j, start + len, tmp[j], val);
 		}
-		drm_intel_gem_bo_unmap_gtt(staging_bo);
+		munmap(gtt_ptr, staging_buf->surface[0].size);
 
 		igt_progress("partial read/writes test: ", i, ROUNDS);
 	}
 }
 
-static void do_tests(int cache_level, const char *suffix)
+static void do_tests(data_t *data, int cache_level, const char *suffix)
 {
 	igt_fixture {
 		if (cache_level != -1)
-			gem_set_caching(fd, scratch_bo->handle, cache_level);
+			gem_set_caching(data->drm_fd, scratch_buf->handle, cache_level);
 	}
 
 	igt_subtest_f("reads%s", suffix)
-		test_partial_reads();
+		test_partial_reads(data);
 
 	igt_subtest_f("write%s", suffix)
-		test_partial_writes();
+		test_partial_writes(data);
 
 	igt_subtest_f("writes-after-reads%s", suffix)
-		test_partial_read_writes();
+		test_partial_read_writes(data);
 }
 
 igt_main
 {
+	data_t data = {0, };
 	srandom(0xdeadbeef);
 
 	igt_fixture {
-		fd = drm_open_driver(DRIVER_INTEL);
-		igt_require_gem(fd);
-		gem_require_blitter(fd);
+		data.drm_fd = drm_open_driver(DRIVER_INTEL);
+		igt_require_gem(data.drm_fd);
+		gem_require_blitter(data.drm_fd);
+
+		data.devid = intel_get_drm_devid(data.drm_fd);
+		data.bops = buf_ops_create(data.drm_fd);
 
-		bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
-		devid = intel_get_drm_devid(fd);
-		batch = intel_batchbuffer_alloc(bufmgr, devid);
+		ibb = intel_bb_create(data.drm_fd, PAGE_SIZE);
 
-		/* overallocate the buffers we're actually using because */
-		scratch_bo = drm_intel_bo_alloc(bufmgr, "scratch bo", BO_SIZE, 4096);
-		staging_bo = drm_intel_bo_alloc(bufmgr, "staging bo", BO_SIZE, 4096);
+		/* overallocate the buffers we're actually using because */	
+		scratch_buf = intel_buf_create(data.bops, BO_SIZE/4, 1, 32, 0, I915_TILING_NONE, 0);
+		staging_buf = intel_buf_create(data.bops, BO_SIZE/4, 1, 32, 0, I915_TILING_NONE, 0);
 	}
 
-	do_tests(-1, "");
+	do_tests(&data, -1, "");
 
 	/* Repeat the tests using different levels of snooping */
-	do_tests(0, "-uncached");
-	do_tests(1, "-snoop");
-	do_tests(2, "-display");
+	do_tests(&data, 0, "-uncached");
+	do_tests(&data, 1, "-snoop");
+	do_tests(&data, 2, "-display");
 
 	igt_fixture {
-		drm_intel_bufmgr_destroy(bufmgr);
-
-		close(fd);
+		intel_bb_destroy(ibb);
+		intel_buf_destroy(scratch_buf);
+		intel_buf_destroy(staging_buf);
+		buf_ops_destroy(data.bops);
+		close(data.drm_fd);
 	}
 }