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authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2020-08-25 14:45:52 +0300
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>2020-09-03 19:07:55 +0300
commit0385b5258fddc324435b123283b46e528fbbf33b (patch)
treea30abe2d5dbe98b7d86434f5f8590d8c065ed66d
parent5b6c8235240514a33cdfa3ccd0f1a05a72a3f4a8 (diff)
pciids/i915: break TGL into GT1/2
Align with kernel commit: d452bd091e168f ("drm/i915: break TGL pci-ids in GT 1 & 2") Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
-rw-r--r--lib/i915_pciids.h14
-rw-r--r--lib/intel_device_info.c15
2 files changed, 22 insertions, 7 deletions
diff --git a/lib/i915_pciids.h b/lib/i915_pciids.h
index 8e7ae30e..7eeecb07 100644
--- a/lib/i915_pciids.h
+++ b/lib/i915_pciids.h
@@ -594,19 +594,25 @@
INTEL_VGA_DEVICE(0x4E51, info)
/* TGL */
-#define INTEL_TGL_12_IDS(info) \
+#define INTEL_TGL_12_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x9A60, info), \
+ INTEL_VGA_DEVICE(0x9A68, info), \
+ INTEL_VGA_DEVICE(0x9A70, info)
+
+#define INTEL_TGL_12_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x9A40, info), \
INTEL_VGA_DEVICE(0x9A49, info), \
INTEL_VGA_DEVICE(0x9A59, info), \
- INTEL_VGA_DEVICE(0x9A60, info), \
- INTEL_VGA_DEVICE(0x9A68, info), \
- INTEL_VGA_DEVICE(0x9A70, info), \
INTEL_VGA_DEVICE(0x9A78, info), \
INTEL_VGA_DEVICE(0x9AC0, info), \
INTEL_VGA_DEVICE(0x9AC9, info), \
INTEL_VGA_DEVICE(0x9AD9, info), \
INTEL_VGA_DEVICE(0x9AF8, info)
+#define INTEL_TGL_12_IDS(info) \
+ INTEL_TGL_12_GT1_IDS(info), \
+ INTEL_TGL_12_GT2_IDS(info)
+
/* RKL */
#define INTEL_RKL_IDS(info) \
INTEL_VGA_DEVICE(0x4C80, info), \
diff --git a/lib/intel_device_info.c b/lib/intel_device_info.c
index d5f70156..e1132d9c 100644
--- a/lib/intel_device_info.c
+++ b/lib/intel_device_info.c
@@ -315,10 +315,18 @@ static const struct intel_device_info intel_elkhartlake_info = {
.codename = "elkhartlake"
};
-static const struct intel_device_info intel_tigerlake_info = {
+static const struct intel_device_info intel_tigerlake_gt1_info = {
.gen = BIT(11),
.is_tigerlake = true,
- .codename = "tigerlake"
+ .codename = "tigerlake",
+ .gt = 1,
+};
+
+static const struct intel_device_info intel_tigerlake_gt2_info = {
+ .gen = BIT(11),
+ .is_tigerlake = true,
+ .codename = "tigerlake",
+ .gt = 2,
};
static const struct intel_device_info intel_rocketlake_info = {
@@ -416,7 +424,8 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_EHL_IDS(&intel_elkhartlake_info),
- INTEL_TGL_12_IDS(&intel_tigerlake_info),
+ INTEL_TGL_12_GT1_IDS(&intel_tigerlake_gt1_info),
+ INTEL_TGL_12_GT2_IDS(&intel_tigerlake_gt2_info),
INTEL_RKL_IDS(&intel_rocketlake_info),
INTEL_DG1_IDS(&intel_dg1_info),