summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_vpg.h
blob: 6161e9e6635560fa0d76f9912a9f8393aec09f5d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
/*
 * Copyright 2020 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DAL_DCN30_VPG_H__
#define __DAL_DCN30_VPG_H__


#define DCN30_VPG_FROM_VPG(vpg)\
	container_of(vpg, struct dcn30_vpg, base)

#define VPG_DCN3_REG_LIST(id) \
	SRI(VPG_GENERIC_STATUS, VPG, id), \
	SRI(VPG_GENERIC_PACKET_ACCESS_CTRL, VPG, id), \
	SRI(VPG_GENERIC_PACKET_DATA, VPG, id), \
	SRI(VPG_GSP_FRAME_UPDATE_CTRL, VPG, id), \
	SRI(VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG, id)

struct dcn30_vpg_registers {
	uint32_t VPG_GENERIC_STATUS;
	uint32_t VPG_GENERIC_PACKET_ACCESS_CTRL;
	uint32_t VPG_GENERIC_PACKET_DATA;
	uint32_t VPG_GSP_FRAME_UPDATE_CTRL;
	uint32_t VPG_GSP_IMMEDIATE_UPDATE_CTRL;
};

#define DCN3_VPG_MASK_SH_LIST(mask_sh)\
	SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_OCCURED, mask_sh),\
	SE_SF(VPG0_VPG_GENERIC_STATUS, VPG_GENERIC_CONFLICT_CLR, mask_sh),\
	SE_SF(VPG0_VPG_GENERIC_PACKET_ACCESS_CTRL, VPG_GENERIC_DATA_INDEX, mask_sh),\
	SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE0, mask_sh),\
	SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE1, mask_sh),\
	SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE2, mask_sh),\
	SE_SF(VPG0_VPG_GENERIC_PACKET_DATA, VPG_GENERIC_DATA_BYTE3, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC0_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC1_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC2_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC3_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC4_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC5_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC6_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC7_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC8_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC9_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC10_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC11_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC12_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC13_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_FRAME_UPDATE_CTRL, VPG_GENERIC14_FRAME_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC0_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC1_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC2_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC3_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC5_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC6_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC7_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC8_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC9_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC10_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC11_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC12_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC13_IMMEDIATE_UPDATE, mask_sh),\
	SE_SF(VPG0_VPG_GSP_IMMEDIATE_UPDATE_CTRL, VPG_GENERIC14_IMMEDIATE_UPDATE, mask_sh)

#define VPG_DCN3_REG_FIELD_LIST(type) \
	type VPG_GENERIC_CONFLICT_OCCURED;\
	type VPG_GENERIC_CONFLICT_CLR;\
	type VPG_GENERIC_DATA_INDEX;\
	type VPG_GENERIC_DATA_BYTE0;\
	type VPG_GENERIC_DATA_BYTE1;\
	type VPG_GENERIC_DATA_BYTE2;\
	type VPG_GENERIC_DATA_BYTE3;\
	type VPG_GENERIC0_FRAME_UPDATE;\
	type VPG_GENERIC1_FRAME_UPDATE;\
	type VPG_GENERIC2_FRAME_UPDATE;\
	type VPG_GENERIC3_FRAME_UPDATE;\
	type VPG_GENERIC4_FRAME_UPDATE;\
	type VPG_GENERIC5_FRAME_UPDATE;\
	type VPG_GENERIC6_FRAME_UPDATE;\
	type VPG_GENERIC7_FRAME_UPDATE;\
	type VPG_GENERIC8_FRAME_UPDATE;\
	type VPG_GENERIC9_FRAME_UPDATE;\
	type VPG_GENERIC10_FRAME_UPDATE;\
	type VPG_GENERIC11_FRAME_UPDATE;\
	type VPG_GENERIC12_FRAME_UPDATE;\
	type VPG_GENERIC13_FRAME_UPDATE;\
	type VPG_GENERIC14_FRAME_UPDATE;\
	type VPG_GENERIC0_IMMEDIATE_UPDATE;\
	type VPG_GENERIC1_IMMEDIATE_UPDATE;\
	type VPG_GENERIC2_IMMEDIATE_UPDATE;\
	type VPG_GENERIC3_IMMEDIATE_UPDATE;\
	type VPG_GENERIC4_IMMEDIATE_UPDATE;\
	type VPG_GENERIC5_IMMEDIATE_UPDATE;\
	type VPG_GENERIC6_IMMEDIATE_UPDATE;\
	type VPG_GENERIC7_IMMEDIATE_UPDATE;\
	type VPG_GENERIC8_IMMEDIATE_UPDATE;\
	type VPG_GENERIC9_IMMEDIATE_UPDATE;\
	type VPG_GENERIC10_IMMEDIATE_UPDATE;\
	type VPG_GENERIC11_IMMEDIATE_UPDATE;\
	type VPG_GENERIC12_IMMEDIATE_UPDATE;\
	type VPG_GENERIC13_IMMEDIATE_UPDATE;\
	type VPG_GENERIC14_IMMEDIATE_UPDATE


struct dcn30_vpg_shift {
	VPG_DCN3_REG_FIELD_LIST(uint8_t);
};

struct dcn30_vpg_mask {
	VPG_DCN3_REG_FIELD_LIST(uint32_t);
};

struct vpg;

struct vpg_funcs {
	void (*update_generic_info_packet)(
		struct vpg *vpg,
		uint32_t packet_index,
		const struct dc_info_packet *info_packet);
};

struct vpg {
	const struct vpg_funcs *funcs;
	struct dc_context *ctx;
	int inst;
};

struct dcn30_vpg {
	struct vpg base;
	const struct dcn30_vpg_registers *regs;
	const struct dcn30_vpg_shift *vpg_shift;
	const struct dcn30_vpg_mask *vpg_mask;
};

void vpg3_construct(struct dcn30_vpg *vpg3,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn30_vpg_registers *vpg_regs,
	const struct dcn30_vpg_shift *vpg_shift,
	const struct dcn30_vpg_mask *vpg_mask);


#endif