/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __ASM_MACH_CPUTYPE_H #define __ASM_MACH_CPUTYPE_H #include /* * CPU Stepping CPU_ID CHIP_ID * * PXA168 S0 0x56158400 0x0000C910 * PXA168 A0 0x56158400 0x00A0A168 * PXA910 Y1 0x56158400 0x00F2C920 * PXA910 A0 0x56158400 0x00F2C910 * PXA910 A1 0x56158400 0x00A0C910 * PXA920 Y0 0x56158400 0x00F2C920 * PXA920 A0 0x56158400 0x00A0C920 * PXA920 A1 0x56158400 0x00A1C920 * MMP2 Z0 0x560f5811 0x00F00410 * MMP2 Z1 0x560f5811 0x00E00410 * MMP2 A0 0x560f5811 0x00A0A610 */ extern unsigned int mmp_chip_id; #ifdef CONFIG_CPU_PXA168 static inline int cpu_is_pxa168(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && ((mmp_chip_id & 0xfff) == 0x168); } #else #define cpu_is_pxa168() (0) #endif /* cpu_is_pxa910() is shared on both pxa910 and pxa920 */ #ifdef CONFIG_CPU_PXA910 static inline int cpu_is_pxa910(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && (((mmp_chip_id & 0xfff) == 0x910) || ((mmp_chip_id & 0xfff) == 0x920)); } #else #define cpu_is_pxa910() (0) #endif #if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT) static inline int cpu_is_mmp2(void) { return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && (((mmp_chip_id & 0xfff) == 0x410) || ((mmp_chip_id & 0xfff) == 0x610)); } #else #define cpu_is_mmp2() (0) #endif #endif /* __ASM_MACH_CPUTYPE_H */