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path: root/drivers/gpu/drm
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2019-09-03drm/msm/dsi: Fix return value check for clk_get_parentSean Paul1-4/+4
clk_get_parent returns an error pointer upon failure, not NULL. So the checks as they exist won't catch a failure. This patch changes the checks and the return values to properly handle an error pointer. Fixes: c4d8cfe516dc ("drm/msm/dsi: add implementation for helper functions") Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Sean Paul <seanpaul@chromium.org> Cc: Rob Clark <robdclark@chromium.org> Cc: <stable@vger.kernel.org> # v4.19+ Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm: add atomic tracesRob Clark5-4/+136
This was useful for debugging fps drops. I suspect it will be useful again. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
2019-09-03drm/msm/dpu: async commit supportRob Clark6-45/+34
In addition, moving to kms->flush_commit() lets us drop the only user of kms->commit(). Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
2019-09-03drm/msm: async commit supportRob Clark4-1/+210
Now that flush/wait/complete is decoupled from the "synchronous" part of atomic commit_tail(), add support to defer flush to a timer that expires shortly before vblank for async commits. In this way, multiple atomic commits (for example, cursor updates) can be coalesced into a single flush at the end of the frame. v2: don't hold lock over ->wait_flush(), to avoid locking interaction that was causing fps drop when combining page flips or non-async atomic commits and lots of legacy cursor updates Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
2019-09-03drm/msm: split power control from prepare/complete_commitRob Clark5-14/+54
With atomic commit, ->prepare_commit() and ->complete_commit() may not be evenly balanced (although ->complete_commit() will complete each crtc that had been previously prepared). So these will no longer be a good place to enable/disable clocks needed for hw access. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
2019-09-03drm/msm: add kms->flush_commit()Rob Clark5-4/+63
Add ->flush_commit(crtc_mask). Currently a no-op, but kms backends should migrate writing flush registers to this hook, so we can decouple pushing updates to hardware, and flushing the updates. Once we add async commit support, the hw updates will be pushed down to the hw synchronously, but flushing the updates will be deferred until as close to vblank as possible, so that multiple updates can be combined in a single frame. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
2019-09-03drm/msm: convert kms->complete_commit() to crtc_maskRob Clark7-36/+11
Prep work for async commits, in which case this will be called after we no longer have the atomic state object. This drops some wait_for_vblanks(), but those should be unnecessary, as we call this after waiting for flush to complete. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run>
2019-09-03drm/msm: add kms->wait_flush()Rob Clark5-42/+54
First step in re-working the atomic related internal API to prepare for async updates pending.. ->wait_flush() is intended to block until there is no in-progress flush. A crtc_mask is used, rather than an atomic state object, as this will later be used for async flush after the atomic state is destroyed. This replaces ->wait_for_crtc_commit_done() v2: update for review comments Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: handle_frame_done() from vblank irqRob Clark2-23/+9
Previously the callback was called from whoever called wait_for_vblank(), but that isn't a great plan when wait_for_vblank() stops getting called, and results in frame_done_timer expiring. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: add real wait_for_commit_done()Rob Clark1-1/+21
Just waiting for next vblank isn't ideal.. we should really be looking at the hw FLUSH register value to know if there is still an in-progress flush without stalling unnecessarily when there is no pending flush. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: unwind async commit handlingRob Clark6-57/+37
It attempted to avoid fps drops in the presence of cursor updates. But it is racing, and can result in hw updates after flush before vblank, which leads to underruns. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: remove unused argRob Clark3-4/+3
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: remove some impossible error checkingRob Clark6-45/+0
I'm sure there is plenty more to remove.. this is just some of the ones I noticed. Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: add rotation propertyRob Clark1-0/+20
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm: Remove Kconfig defaultJordan Crouse1-1/+1
Remove the default for CONFIG_DRM_MSM and let the user select the driver manually as one does. Additionally select QCOM_COMMAND_DB for ARCH_QCOM targets to make sure it doesn't get missed when we need it for a6xx targets. v2: Move from default 'm' to no default Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: remove stray "\n"Rob Clark1-1/+1
The extra line-break in traces was annoying me. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: fix "frame done" timeoutsRob Clark4-33/+38
Previously, dpu_crtc_frame_event_work() would try to aquire all the modeset locks in order to check whether it can release bandwidth. (If we only have cmd-mode display, bandwidth can be released at frame-done time.) The problem with this is that it is also responsible for signalling frame_done_comp, which dpu_crtc_commit_kickoff() waits on if there is already a frame pending. This is called in the msm_atomic_commit_tail() path.. which means that for non-nonblock commits, at least some of the modeset locks are already held. Re-work this scheme to use a reference count to track our need to have clocks enabled. It is incremented for each atomic commit, and decremented in the corresponding frame-done. Additionally, any crtc used in video mode hold an extra reference while they are enabled. The net effect is that we can determine in frame-done whether it is safe to drop bandwidth without needing to aquire any modeset locks. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <sean@chromium.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm: Use struct_size() helperGustavo A. R. Silva1-2/+2
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct msm_gem_submit { ... struct { ... } bos[0]; }; Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes. So, replace the following form: sizeof(*submit) + ((u64)nr_bos * sizeof(submit->bos[0])) with: struct_size(submit, bos, nr_bos) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm: Use generic bulk clock functionJordan Crouse4-43/+2
Remove the homebrewed bulk clock get function and replace it with devm_clk_bulk_get_all(). Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/mdp5: Find correct node for creating gem address spaceJeffrey Hugo1-1/+6
Creating the msm gem address space requires a reference to the dev where the iommu is located. The driver currently assumes this is the same as the platform device, which breaks when the iommu is outside of the platform device (ie in the parent). Default to using the platform device, but check to see if that has an iommu reference, and if not, use the parent device instead. This should handle all the various iommu designs for mdp5 supported systems. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/phy/dsi_phy: silence -EPROBE_DEFER warningsBrian Masney1-5/+7
The following errors show up when booting the Nexus 5: msm_dsi_phy fd922a00.dsi-phy: [drm:dsi_phy_driver_probe] *ERROR* dsi_phy_regulator_init: failed to init regulator, ret=-517 msm_dsi_phy fd922a00.dsi-phy: [drm:dsi_phy_driver_probe] *ERROR* dsi_phy_driver_probe: failed to init regulator dsi_phy_regulator_init() already logs the error, so no need to log the same error a second time in dsi_phy_driver_probe(). This patch also changes dsi_phy_regulator_init() to not log the error if the error code is -EPROBE_DEFER to reduce noise in dmesg. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> [add some {}'s] Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/a6xx: add missing MODULE_FIRMWARE()Rob Clark1-0/+1
For platforms that require the "zap shader" to take the GPU out of secure mode at boot, we also need the zap fw to end up in the initrd. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/mdp5: Add msm8998 supportJeffrey Hugo1-5/+127
Add support for MDP5 version v3.0 found on msm8998. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> [silence unitialized variable warnings] Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: remove dpu_mdss:hwversionRob Clark1-5/+0
Unused and the extra rpm get/put interferes with handover from bootloader (ie. happens before we have a chance to check if things are already enabled). Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm: Transition console to msm framebufferJeffrey Hugo1-0/+3
If booting a device using EFI, efifb will likely come up and claim the console. When the msm display stack finally comes up, we want the console to move over to the msm fb, so add support to kick out any firmware based framebuffers to accomplish the console transition. Suggested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Reviewed-by: Rob Clark <robdclark@gmail.com> Tested-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/hdmi: Convert to use GPIO descriptorsLinus Walleij3-67/+45
This switches the MSM HDMI code to use GPIO descriptors. Normally we would fetch the GPIOs from the device with the flags GPIOD_IN or GPIOD_OUT_[LOW|HIGH] to set up the lines immediately, but since the code seems eager to actively drive the lines high/low when turning HDMI on and off, we just fetch the GPIOs as-is and keep the code explicitly driving them. The old code would try legacy bindings (GPIOs without any "-gpios" suffix) but this has been moved to the gpiolib as a quirk by the previous patch. Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dpu: Drop unused GPIO codeLinus Walleij3-9/+5
The DPU has some kind of idea that it wants to be able to bring up power using GPIO lines. The struct dss_gpio is however completely unused and should this be done, it should be done using the GPIO descriptor framework rather than this API which relies on the global GPIO numberspace. Delete this code before anyone hurt themselves. The inclusion of <linux/gpio.h> was abused to get some OF and IRQ headers implicitly included into the DPU utilities, make these includes explicit and push them down into the actual implementation. Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/dsi: Drop unused GPIO includesLinus Walleij1-2/+0
This DSI driver uses the new descriptor API so these old GPIO API includes are surplus. Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm/mdp4: Drop unused GPIO includeLinus Walleij1-2/+0
This file is not using any symbols from <linux/gpio.h> so just drop this include. Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Brian Masney <masneyb@onstation.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-09-03drm/msm: drop use of drmP.hSam Ravnborg40-18/+99
Drop the deprecated drmP.h header file, and trim msm_drv.h to the relevant include files. This resulted in a suprisingly many edits as many files relied on headers included via msm_drv.h. But msm_drv.h is not supposed to carry include files it do not need, so the individual files have to include what extra they needs. v2: - Rebased on top of https://gitlab.freedesktop.org/drm/msm.git msm-next Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Jordan Crouse <jcrouse@codeaurora.org> Cc: Jeykumar Sankaran <jsanka@codeaurora.org> Cc: Bruce Wang <bzwang@chromium.org> Cc: Shayenne Moura <shayenneluzmoura@gmail.com> Cc: Mamta Shukla <mamtashukla555@gmail.com> Cc: Jonathan Marek <jonathan@marek.ca> Cc: Carsten Behling <carsten.behling@googlemail.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cc: Sibi Sankar <sibis@codeaurora.org> Cc: Todor Tomov <todor.tomov@linaro.org> Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190804065551.GA5211@ravnborg.org
2019-09-01drm/exynos: drop use of drmP.hSam Ravnborg7-3/+19
There was a few uses of drmP that was missed in the last patch removing this header from exynos. Remove the final uses of this header. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Inki Dae <inki.dae@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Jingoo Han <jingoohan1@gmail.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
2019-08-27Merge tag 'drm-next-5.4-2019-08-23' of ↵Dave Airlie228-3441/+8050
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.4-2019-08-23: amdgpu: - Enable power features on Navi12 - Enable power features on Arcturus - RAS updates - Initial Renoir APU support - Enable power featyres on Renoir - DC gamma fixes - DCN2 fixes - GPU reset support for Picasso - Misc cleanups and fixes scheduler: - Possible race fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190823202620.3870-1-alexander.deucher@amd.com
2019-08-27Merge tag 'drm-misc-next-2019-08-23' of ↵Dave Airlie40-537/+842
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.4: UAPI Changes: Cross-subsystem Changes: Core Changes: - dma-buf: dma-fence selftests Driver Changes: - kirin: Various cleanups and reworks - komeda: Add support for DT memory-regions - meson: Rely on the compatible to detect vpu features - omap: Implement alpha and pixel blend mode properties - panfrost: Implement per-fd address spaces, various fixes - rockchip: DSI DT binding rework - fbdev: Various cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190823083509.c7mduqdqjnxc7ubb@flea
2019-08-27Merge tag 'drm-hisilicon-hibmc-next-2019-08-26' of ↵Dave Airlie2-17/+4
https://github.com/xin3liang/linux into drm-next Three small cleanup and fix patches for 5.4 hisilicon hibmc driver. I have tested and verified on taishan 2280v1/v2 machines. Signed-off-by: Dave Airlie <airlied@redhat.com> From: xinliang <z.liuxinliang@hisilicon.com> Link: https://patchwork.freedesktop.org/patch/msgid/5D63A271.7080400@hisilicon.com
2019-08-27Merge tag 'imx-drm-next-2019-08-23' of git://git.pengutronix.de/pza/linux ↵Dave Airlie1-1/+0
into drm-next drm/imx: IPUv3 image converter fixes and improvements Fix image converter seam handling for 1024x1024 pixel hardware limitation at the main processing section input, improve error handling, and slightly optimize for 1:1 conversions. Add support for newly defined 32-bit RGB V4L2 pixel formats. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Philipp Zabel <p.zabel@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/1566573659.23587.2.camel@pengutronix.de
2019-08-27Merge tag 'drm-intel-next-2019-08-22' of ↵Dave Airlie286-7382/+11445
git://anongit.freedesktop.org/drm/drm-intel into drm-next - More TGL enabling work (Michel, Jose, Lucas) - Fixes on DP MST (Ville) - More GTT and Execlists fixes and improvements (Chris) - Code style clean-up on hdmi and dp side (Jani) - Fix null pointer dereferrence (Xiong) - Fix a couple of missing serialization on selftests (Chris) - More vm locking rework (Chris) drm-intel-next-2019-08-20: - GuC and HuC related fixes and improvements (Daniele, Michal) - Improve debug with more engine information and rework on debugfs files (Chris, Stuart) - Simplify appearture address handling (Chris) - Other fixes and cleanups around engines and execlists (Chris) - Selftests fixes (Matt, Chris) - Gen11 cache flush related fixes and improvements (Mika) - More work around requests, timelines and locks to allow removal of struct_mutex (Chris) - Add missing CML PCI ID (Anusha) - More work on the new i915 buddy allocator (Matt) - More headers, files and directories reorg (Daniele) - Improvements on ggtt’s get pdp (Mika) - Fix GPU reset (Chris) - Fix GPIO pins on gen11 (Matt) - Fix HW readout for crtc_clock in HDMI mode (Imre) - Sanitize display Phy during unitit to workaround messages of HW state change during suspend (Imre) - Be defensive when starting vma activity (Chris) - More Tiger Lake enabling work (Michel, Daniele, Lucas) - Relax pd_used assertion (Chris) drm-intel-next-2019-08-13: - More Tiger Lake enabling work (Lucas, Jose, Tomasz, Michel, Jordan, Anusha, Vandita) - More selftest organization reworks, fixes and improvements (Lucas, Chris) - Simplifications on GEM code like context and cleanup_early (Chris, Daniele) - GuC and HuC related fixes and improvements (Daniele, Michal, Chris) - Some clean up and fixes on headers, Makefile, and generated files (Lucas, Jani) - MOCS setup clean up (Tvrtko) - More Elkhartlake enabling work (Jose, Matt) - Fix engine reset by clearing in flight execlists requests (Chris) - Fix possible memory leak on intel_hdcp_auth_downstream (Wei) - Introduce intel_gt_runtime_suspend/resume (Daniele) - PMU improvements (Tvrtko) - Flush extra hard after writing relocations through the GTT (Chris) - Documentations fixes (Michal, Chris) - Report dma_reserv allocation failure (Chris) - Improvements around shrinker (Chris) - More improvements around engine handling (Chris) - Also more s/dev_priv/i915 (Chris) - Abstract display suspend/resume operations (Rodrigo/Jani) - Drop VM_IO from GTT mappings (Chris) - Fix some NULL vs IS_ERR conditions (Dan) - General improvements on error state (Chris) - Isolate i915_getparam_iocrtl to its own file (Chris) - Perf OA object refactor (Umesh) - Ignore central i915->kernel_context and allocate it directly (Chris) - More fixes and improvements around wakerefs (Chris) - Clean-up and improvements around debugfs (Chris) - Free the imported shmemfs file for phys objects (Chris) - Many other fix and cleanups around engines and execlists (Chris) - Split out uncore_mmio_debug (Daniele) - Memory management fixes for blk and gtt (Matt) - Introduction of buddy allocator to handle huge-pages for GTT (Matt) - Fix ICL and TGL PG3 power domains (Anshuman) - Extract GT IRQ to gt/ (Andi) - Drop last_fence tracking in favor of whole vma->active (Chris) - Make overlay to use i915_active instead of i915_active_request (Chris) - Move misc display IRQ handling to its own function (Jose) - Introduce new _TRANS2() macro in preparation for some coming PSR related work (Jose) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190823051435.GA23885@intel.com
2019-08-26drm/hisilicon/hibmc: Make CONFIG_DRM_HISI_HIBMC depend on ARM64Matthew Ruffell1-1/+1
Hisilicon developed hibmc_drm for their arm64 based soc and did not intend for this driver to be used on any other architecture than arm64. Using it on amd64 leads to incorrect video modes being used, making the screen unreadable, forcing users to manually blacklist the module on the kernel command line to use the d-i server installer or any graphical sessions. Make CONFIG_DRM_HISI_HIBMC firmly depend on ARM64 to ensure it is not built for other architectures. Signed-off-by: Matthew Ruffell <matthew.ruffell@canonical.com> Signed-off-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
2019-08-26drm/hisilicon: Use dev_get_drvdataChuhong Yuan1-4/+2
Instead of using to_pci_dev + pci_get_drvdata, use dev_get_drvdata to make code simpler. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Signed-off-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
2019-08-26drm/hisilicon/hibmc: Using module_pci_driver.YueHaibing1-12/+1
Remove boilerplate code by using macro module_pci_driver. Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Xinliang Liu <z.liuxinliang@hisilicon.com> Signed-off-by: Xinliang Liu <z.liuxinliang@hisilicon.com>
2019-08-23drm/amd/display: 3.2.48Anthony Koo1-1/+1
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: flicking observed while installing driver on Navi10 CFhersen wu2-27/+28
[WHY] value of dchub_ref_clock is decided by dchubbub global timer settings which is programmed by vbios command table disp_init. for multi-GPU case, vbios is posted only for primary GPU. without vbios posted for the secondary GPU, value of dchub_ref_clock is not set properly. this value will affect dcn bandwidth calcuation and cause underflow. user will see screen flicking during driver installation for dual GPU case. [HOW] dc init_hw always call vbios command table disp_init to make sure dchubbub global timer is configured and enable. Signed-off-by: hersen wu <hersenxs.wu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Properly read LVTMA_PWRSEQ_CNTLJoshua Aberback1-26/+17
[Why] The register LVTMA_PWRSEQ_CNTL is used to determine the power state of the embedded display. Currently we do not actually read this register's values, so during power down we think that this display is already off, so we skip calling into VBIOS to actually turn it off. [How] - add relevant fields to shift / mask initialization Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: revert wait in pipelockJun Lei1-11/+0
[why] Previous workaround to prevent a vsync flip to be converted to immediate flip is no longer needed, and is risky because there are cases where it can result in infinite loop. [how] Remove wait loop (which is potentially infinite) before locking pipe Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Use res_cap to acquire i2c instead of pipe countDerek Lai1-1/+2
[Why] We should be using the ddc_num from res_caps. As the pipe count != number of i2c resources. [How] Use ddc_num from res_cap instead of pipe count. Signed-off-by: Derek Lai <Derek.Lai@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Expose OTG_V_TOTAL_MID for HW DiagsBayan Zabihiyan9-4/+37
[Why] Existing HW Features, HW Diags test requested that the registers be exposed. [How] Add V_TOTAL_MID to existing DC structures. Make sure values are passed down throughout DC Add Register definition. Program the additional registers Add additional Logic for V_TOTAL_CONTROL. Signed-off-by: Bayan Zabihiyan <bayan.zabihiyan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: fix DML not calculating delivery timeJun Lei1-0/+27
[why] Calculating DCFCLK DS time requires calculating delivery time for luma/chroma, but this value is not calculated in DMLv2, it was inadvertently removed when porting DMLv2 [how] Add the calculation back Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: MST topology debugfsDavid Francis1-0/+24
DRM provides drm_dp_mst_dump_topology, which prints useful information about MST devices Hook this up to a debugfs file named amdgpu_mst_topology Signed-off-by: David Francis <David.Francis@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: set av_mute in hw_init for HDMICharlene Liu4-0/+28
[Description] OS will reserve HW state in UEFI mode. Driver init_hw reset to RGB which caused HDMI green in YCbCr mode. read HW blank_color based on acc_mode. Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Add Logging for Gamma Related informationWyatt Wood2-8/+8
[Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add logging in dc. Fix formatting for easier graphing. Signed-off-by: Wyatt Wood <wyatt.wood@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2019-08-23drm/amd/display: Enable HW rotationJaehyun Chung3-5/+60
[Why] HW rotation is not enabled. Calculations for cursor rotation are wrong for the values passed to set_cursor_position. [How] Swap Src rect and height and vertically mirror surface for the correct surface rotation direction. Cursor position is rotated according to angle. Offset calculations are tweaked for non-rotated cursor hotspot and width/height. Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 01:53:56 +0000