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2019-08-27Merge tag 'drm-intel-next-2019-08-22' of ↵Dave Airlie286-7382/+11445
git://anongit.freedesktop.org/drm/drm-intel into drm-next - More TGL enabling work (Michel, Jose, Lucas) - Fixes on DP MST (Ville) - More GTT and Execlists fixes and improvements (Chris) - Code style clean-up on hdmi and dp side (Jani) - Fix null pointer dereferrence (Xiong) - Fix a couple of missing serialization on selftests (Chris) - More vm locking rework (Chris) drm-intel-next-2019-08-20: - GuC and HuC related fixes and improvements (Daniele, Michal) - Improve debug with more engine information and rework on debugfs files (Chris, Stuart) - Simplify appearture address handling (Chris) - Other fixes and cleanups around engines and execlists (Chris) - Selftests fixes (Matt, Chris) - Gen11 cache flush related fixes and improvements (Mika) - More work around requests, timelines and locks to allow removal of struct_mutex (Chris) - Add missing CML PCI ID (Anusha) - More work on the new i915 buddy allocator (Matt) - More headers, files and directories reorg (Daniele) - Improvements on ggtt’s get pdp (Mika) - Fix GPU reset (Chris) - Fix GPIO pins on gen11 (Matt) - Fix HW readout for crtc_clock in HDMI mode (Imre) - Sanitize display Phy during unitit to workaround messages of HW state change during suspend (Imre) - Be defensive when starting vma activity (Chris) - More Tiger Lake enabling work (Michel, Daniele, Lucas) - Relax pd_used assertion (Chris) drm-intel-next-2019-08-13: - More Tiger Lake enabling work (Lucas, Jose, Tomasz, Michel, Jordan, Anusha, Vandita) - More selftest organization reworks, fixes and improvements (Lucas, Chris) - Simplifications on GEM code like context and cleanup_early (Chris, Daniele) - GuC and HuC related fixes and improvements (Daniele, Michal, Chris) - Some clean up and fixes on headers, Makefile, and generated files (Lucas, Jani) - MOCS setup clean up (Tvrtko) - More Elkhartlake enabling work (Jose, Matt) - Fix engine reset by clearing in flight execlists requests (Chris) - Fix possible memory leak on intel_hdcp_auth_downstream (Wei) - Introduce intel_gt_runtime_suspend/resume (Daniele) - PMU improvements (Tvrtko) - Flush extra hard after writing relocations through the GTT (Chris) - Documentations fixes (Michal, Chris) - Report dma_reserv allocation failure (Chris) - Improvements around shrinker (Chris) - More improvements around engine handling (Chris) - Also more s/dev_priv/i915 (Chris) - Abstract display suspend/resume operations (Rodrigo/Jani) - Drop VM_IO from GTT mappings (Chris) - Fix some NULL vs IS_ERR conditions (Dan) - General improvements on error state (Chris) - Isolate i915_getparam_iocrtl to its own file (Chris) - Perf OA object refactor (Umesh) - Ignore central i915->kernel_context and allocate it directly (Chris) - More fixes and improvements around wakerefs (Chris) - Clean-up and improvements around debugfs (Chris) - Free the imported shmemfs file for phys objects (Chris) - Many other fix and cleanups around engines and execlists (Chris) - Split out uncore_mmio_debug (Daniele) - Memory management fixes for blk and gtt (Matt) - Introduction of buddy allocator to handle huge-pages for GTT (Matt) - Fix ICL and TGL PG3 power domains (Anshuman) - Extract GT IRQ to gt/ (Andi) - Drop last_fence tracking in favor of whole vma->active (Chris) - Make overlay to use i915_active instead of i915_active_request (Chris) - Move misc display IRQ handling to its own function (Jose) - Introduce new _TRANS2() macro in preparation for some coming PSR related work (Jose) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190823051435.GA23885@intel.com
2019-08-23drm/nouveau/volt: Fix for some cards having 0 maximum voltageMark Menzynski1-0/+2
Some, mostly Fermi, vbioses appear to have zero max voltage. That causes Nouveau to not parse voltage entries, thus users not being able to set higher clocks. When changing this value Nvidia driver still appeared to ignore it, and I wasn't able to find out why, thus the code is ignoring the value if it is zero. CC: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Reviewed-by: Karol Herbst <kherbst@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/dispnv50: Fix runtime PM ref tracking for non-blocking modesetsLyude Paul2-24/+17
This is something that got noticed a while ago back when I was fixing a large number of runtime PM related issues in nouveau, but never got fixed: https://patchwork.freedesktop.org/series/46815/#rev7 It's not safe to iterate the entire list of CRTCs in nv50_disp_atomic_commit(), as we could be doing a non-blocking modeset on one CRTC in parallel with one or more other CRTCs. Likewise, this means it's also not safe to do so in order to track runtime PM state. While this code is certainly wrong, so far the only issues I've seen this cause in the wild is the occasional PM ref unbalance after an atomic check failure + module reloading (since the PCI device will outlive nouveau in such scenarios). So, do this far more elegantly: grab a runtime PM ref across the modeset and commit tail, then grab/put references for each CRTC enable/disable. This also ends up being much simpler then the previous broken solution we had. Finally, since we've removed all it's users: get rid of nouveau_drm->have_disp_power_ref. Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/dispnv04: Remove runtime PMLyude Paul1-50/+1
Originally when trying to fix the issue of runtime PM references with non-blocking CRTCs on nv50, I ended up stumbling on this code when trying to remove nouveau_drm->have_disp_power_ref, and attempted to fix it to remove the dependency on have_disp_power_ref. However, Ilia Mirkin pointed out that this code is actually completely useless, as pre-nv50 never had runtime PM support in the first place! Go figure. So, since it's useless just get rid of it. Note that since the only thing nouveau_crtc_set_config() was doing was grabbing a runtime PM ref, calling drm_crtc_helper_set_config() then dropping the ref; we can just remove the function entirely and just call drm_crtc_helper_set_config() directly. Signed-off-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/gpio: check function 76 in the power check as wellMark Menzynski2-0/+2
Added GPIO is "Power Alert". It's uncertain if this GPIO is set on GPU initialization or only if a change is detected by the GPU at runtime. This GPIO can be found on Tesla and sometimes on Fermi GPUs. Untested, wrote according to documentation. Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/gpio: check the gpio function 16 in the power check as wellMark Menzynski2-0/+2
Added GPIO is "Thermal and External Power Detect". It's uncertain if this GPIO is set on GPU initialization or only if a change is detected by the GPU at runtime. This GPIO can be found in Rankine and Curie and rarely on Tesla GPUs VBIOS. Untested, wrote according to documentation. Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/gpio: fail if gpu external power is missingMark Menzynski2-0/+31
Currently, nouveau doesn't check if GPU is missing power. This patch makes nouveau fail when this happens on latest GPUs. It checks GPIO function 121 (External Power Emergency), which should detect power problems on GPU initialization. This can be disabled with nouveau.config=NvPowerChecks=1 Tested on TU104, GP106 and GF100. v3: * Add config override for disabling power checks Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/gpio: sort gpios by valuesMark Menzynski1-1/+1
One gpio was in wrong place, moved it for better readability. Signed-off-by: Mark Menzynski <mmenzyns@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/therm: don't attempt fan control where PMU is already managing itBen Skeggs3-3/+23
There's already a condition in place which attempts to detect this, but since we've begun to require a PMU subdev even on boards where we don't load a custom FW, it's become inaccurate. This will prevent unnecessarily running a periodic fan update thread on GP100 and newer, where we don't yet override the default PMU FW. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/therm: skip probing for devices not specified in thermal tablesBen Skeggs3-0/+18
Saves some time during driver load, as described by the relevant section[1] of the DCB 4.x specification. [1] https://nvidia.github.io/open-gpu-doc/DCB/DCB-4.x-Specification.html#_i2c_device_table Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: attach pixel blend mode property to planesBen Skeggs3-1/+28
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: attach alpha property to planesBen Skeggs3-1/+7
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: add support for plane zpos propertyBen Skeggs5-12/+40
Has a nice side-effect that we only update HW for this when it changes now, rather than every time we do a page flip. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: attach immutable zpos property to planesBen Skeggs2-0/+18
Defaulting to the fixed layout enforced in HW by EVO, and that we currently use by default on NVD. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: create primary plane before overlay planesBen Skeggs1-7/+7
zpos normalisation uses plane id to determine ordering for duplicate zpos values, and we likely want to keep primary plane on the bottom here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: use __drm_atomic_helper_plane_reset()Ben Skeggs1-3/+2
We have some of this open-coded already, use the helper to prevent problems when adding (for example) support for the alpha property. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: implement csc + enable modern colour managment ↵Ben Skeggs5-7/+99
properties Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100-: use premultiplied alpha blending between planesBen Skeggs1-3/+3
This is apparently the assumed default behaviour when blend properties are absent. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: enable modern color management propertiesIlia Mirkin1-0/+5
For GF119:GV100, we can enable DEGAMMA/CTM/GAMMA. For earlier GPUs, as there is no CTM, having both degamma and gamma is a bit pointless. Later GPUs currently lack an implementation. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gf119-: add ctm property supportIlia Mirkin4-0/+89
This adds support on GF119:GV100 (exclusive) for CTM (aka CSC). Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2019-08-23drm/nouveau/kms/nv50-: remove overlay alpha formatsIlia Mirkin4-14/+0
The overlay logic can only do colorkey-based selection, not alpha-blending. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/fifo/gk104-: fix parsing of mmu fault dataBen Skeggs10-26/+67
Pascal was particularly incorrect, as the register changed to be more in the same format as the MMU fault buffers are. Shouldn't have impacted much more than confusing MMU fault log messages. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/fifo/gf1xx: convert to using nvkm_fault_dataBen Skeggs3-86/+106
Would like to be able to reuse gf100_fifo_intr_fault() for (some of) the later chipsets too, as it's identical. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/init: handle INIT_RESET_END devinit opcodeRhys Kidd1-1/+12
Signal that the reset sequence has completed. This opcode signals that the software reset sequence has completed. Ordinarily, no actual operations are performed by the opcode. However it allows for possible software work arounds by devinit engines in software agents other than the VBIOS, such as the resman, FCODE, and EFI driver. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcodeRhys Kidd1-1/+12
Signal that the reset sequence has begun. This opcode signals that the software reset sequence has begun. Ordinarily, no actual operations are performed by the opcode. However it allows for possible software work arounds by devinit engines in software agents other than the VBIOS, such as the resman, FCODE, and EFI driver. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios: downgrade absence of tmds table to info from an errorRhys Kidd1-1/+1
Absence of a TMDS Info Table is common on Optimus setups where the NVIDIA gpu is not connected directly to any outputs. Reporting an error in this scenario is too harsh. Accordingly, change the error message to an info message. By default the error message also causes a boot flicker for these sytems. Signed-off-by: Rhys Kidd <rhyskidd@gmail.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau: Disable atomic support on a per-device basisVille Syrjälä1-1/+1
We now have per-device driver_features, so let's use that to disable atomic only for pre-nv50. Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Lyude Paul <lyude@redhat.com> Cc: nouveau@lists.freedesktop.org Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: add fp16 scanout supportIlia Mirkin7-18/+66
Older hardware seems to want 0..1024 values, while new hardware takes 0..1 values. We set the gain to 1024 for the earlier display classes. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/nv50-: disable input lut harderBen Skeggs1-0/+2
Under some circumstances, it could be left enabled when it shouldn't be. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/tu102-: disable input lut when input is already FP16Ben Skeggs1-1/+3
On Turing, an input LUT is required to transform inputs in fixed-point formats to FP16 for the internal display pipe. We provide an identity mapping whenever a window is enabled for this reason. HW has error checks to ensure when the input is already FP16, that the input LUT is also disabled. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/kms/gv100: allow windows to use PACKED8BPP formatsBen Skeggs1-1/+1
Required for upcoming FP16 scanout support. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau: fix nvif/device.h is included more than onceHariprasad Kelam1-1/+0
remove duplicate inclusion of nvif/device.h Issue identified by includecheck Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/dispnv04: subdev/bios.h is included more than onceHariprasad Kelam1-1/+0
remove duplicate inclusion of subdev/bios.h Issue identified by includecheck Signed-off-by: Hariprasad Kelam <hariprasad.kelam@gmail.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/mmu: use struct_size() helperGustavo A. R. Silva1-1/+1
Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes, in particular in the context in which this code is being used. So, replace the following form: sizeof(*kind) + sizeof(*kind->data) * mmu->kind_nr; with: struct_size(kind, data, mmu->kind_nr) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau: drop use of drmp.hSam Ravnborg23-28/+14
Drop use of the deprecated drmP.h file from drm/nouveau. Build tested using allyesconfig and allmodconfig. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau: drop drmP.h from all header filesSam Ravnborg4-4/+3
Drop include of the deprecated drmP.h from all nouveau heder files. This allows us to remove drmP.h from all .c files without any side-effects in a follow-up commit. Build tested using allyeyconfig and allmodconfig Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau: drop drmP.h from nouveau_drv.hSam Ravnborg5-1/+13
Drop the deprecated drmP.h header from nouveau_drv.h. Fix fallout in other parts of the driver. Build tested using allmodconfig and allyesconfig. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau: drop use of DRM_UDELAYSam Ravnborg1-1/+1
The DRM_UDELAY is a simple wrapper for udealy() and to be consistent call udelay() direct like in may other places. This avoids the need to pull in drm_os_linux.h when we later drop drmP.h uses in nouveau. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"Colin Ian King1-1/+1
There is a spelling mistake in a warning message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23drm/nouveau/secboot: Make acr_r352_ls_gpccs_func staticYueHaibing1-1/+1
Fix sparse warning: drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c:1092:1: warning: symbol 'acr_r352_ls_gpccs_func' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-22drm/i915: Update DRIVER_DATE to 20190822Rodrigo Vivi1-2/+2
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2019-08-22drm/i915: Kill the undead i915_gem_batch_pool.cChris Wilson1-132/+0
You have to cut it off at the neck, otherwise it just reappears in the next merge, like it did in commit 3f866026f0ce ("Merge drm/drm-next into drm-intel-next-queued") References: 3f866026f0ce ("Merge drm/drm-next into drm-intel-next-queued") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190822065917.18988-1-chris@chris-wilson.co.uk
2019-08-22drm/i915: Replace i915_vma_put_fence()Chris Wilson7-55/+53
Avoid calling i915_vma_put_fence() by using our alternate paths that bind a secondary vma avoiding the original fenced vma. For the few instances where we need to release the fence (i.e. on binding when the GGTT range becomes invalid), replace the put_fence with a revoke_fence. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190822061557.18402-1-chris@chris-wilson.co.uk
2019-08-22drm/i915: Pull obj->userfault tracking under the ggtt->mutexChris Wilson3-5/+11
Since we want to revoke the ggtt vma from only under the ggtt->mutex, we need to move protection of the userfault tracking from the struct_mutex to the ggtt->mutex. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190822060914.2671-2-chris@chris-wilson.co.uk
2019-08-22drm/i915: Track ggtt fence reservations under its own mutexChris Wilson6-49/+87
We can reduce the locking for fence registers from the dev->struct_mutex to a local mutex. We could introduce a mutex for the sole purpose of tracking the fence acquisition, except there is a little bit of overlap with the fault tracking, so use the i915_ggtt.mutex as it covers both. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190822060914.2671-1-chris@chris-wilson.co.uk
2019-08-22drm/i915: Generalise the clflush dma-workerChris Wilson4-80/+183
Extract the dma-fence worker used by clflush for wider use, as we anticipate using workers coupled to dma-fences more frequently. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190821191606.17001-1-chris@chris-wilson.co.uk
2019-08-22Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi876-15102/+134636
We need the rename of reservation_object to dma_resv. The solution on this merge came from linux-next: From: Stephen Rothwell <sfr@canb.auug.org.au> Date: Wed, 14 Aug 2019 12:48:39 +1000 Subject: [PATCH] drm: fix up fallout from "dma-buf: rename reservation_object to dma_resv" Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> --- drivers/gpu/drm/i915/gt/intel_engine_pool.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pool.c b/drivers/gpu/drm/i915/gt/intel_engine_pool.c index 03d90b49584a..4cd54c569911 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pool.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pool.c @@ -43,12 +43,12 @@ static int pool_active(struct i915_active *ref) { struct intel_engine_pool_node *node = container_of(ref, typeof(*node), active); - struct reservation_object *resv = node->obj->base.resv; + struct dma_resv *resv = node->obj->base.resv; int err; - if (reservation_object_trylock(resv)) { - reservation_object_add_excl_fence(resv, NULL); - reservation_object_unlock(resv); + if (dma_resv_trylock(resv)) { + dma_resv_add_excl_fence(resv, NULL); + dma_resv_unlock(resv); } err = i915_gem_object_pin_pages(node->obj); which is a simplified version from a previous one which had: Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2019-08-22Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into ↵Dave Airlie20-658/+913
drm-next Most importantly per-process address spaces on GPUs that are capable of providing proper isolation has finished baking. This is the base for our softpin implementation, which allows us to support the texture descriptor buffers used by GC7000 series GPUs without a major UAPI extension/rework. Shortlog of notable changes: - code cleanup from Fabio - fix performance counters on GC880 and GC2000 GPUs from Christian - drmP.h header removal from Sam - per process address space support on MMUv2 GPUs from me - softpin support from me Signed-off-by: Dave Airlie <airlied@redhat.com> From: Lucas Stach <l.stach@pengutronix.de> Link: https://patchwork.freedesktop.org/patch/msgid/1565946875.2641.73.camel@pengutronix.de
2019-08-22Merge tag 'du-next-20190816' of git://linuxtv.org/pinchartl/media into drm-nextDave Airlie4-38/+5
- R-Car DU fixes - Misc. DRM cleanups Signed-off-by: Dave Airlie <airlied@redhat.com> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190816133500.GJ5020@pendragon.ideasonboard.com
2019-08-21drm/i915/selftests: Fixup a couple of missing serialisation with vmaChris Wilson2-2/+7
In commit 70d6894d1456 ("drm/i915: Serialize against vma moves") I managed to miss a couple of i915_vma_move_to_active() that had not serialised against an async vma pinning. Add the missing i915_request_await. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Matthew Auld <matthew.auld@intel.com> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190821193851.18232-1-chris@chris-wilson.co.uk
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