path: root/drivers/gpu/drm/msm/dsi/dsi_host.c
AgeCommit message (Collapse)AuthorFilesLines
2019-09-03drm/msm/dsi: Fix return value check for clk_get_parentSean Paul1-4/+4
clk_get_parent returns an error pointer upon failure, not NULL. So the checks as they exist won't catch a failure. This patch changes the checks and the return values to properly handle an error pointer. Fixes: c4d8cfe516dc ("drm/msm/dsi: add implementation for helper functions") Cc: Sibi Sankar <> Cc: Sean Paul <> Cc: Rob Clark <> Cc: <> # v4.19+ Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2019-09-03drm/msm/dsi: Drop unused GPIO includesLinus Walleij1-2/+0
This DSI driver uses the new descriptor API so these old GPIO API includes are surplus. Cc: Rob Clark <> Cc: Sean Paul <> Cc: Cc: Signed-off-by: Linus Walleij <> Signed-off-by: Rob Clark <>
2019-09-03drm/msm: drop use of drmP.hSam Ravnborg1-3/+5
Drop the deprecated drmP.h header file, and trim msm_drv.h to the relevant include files. This resulted in a suprisingly many edits as many files relied on headers included via msm_drv.h. But msm_drv.h is not supposed to carry include files it do not need, so the individual files have to include what extra they needs. v2: - Rebased on top of msm-next Signed-off-by: Sam Ravnborg <> Cc: Rob Clark <> Cc: Sean Paul <> Cc: David Airlie <> Cc: Daniel Vetter <> Cc: Jordan Crouse <> Cc: Jeykumar Sankaran <> Cc: Bruce Wang <> Cc: Shayenne Moura <> Cc: Mamta Shukla <> Cc: Jonathan Marek <> Cc: Carsten Behling <> Cc: Maarten Lankhorst <> Cc: Maxime Ripard <> Cc: Paul Kocialkowski <> Cc: Sibi Sankar <> Cc: Todor Tomov <> Cc: Cc: Signed-off-by: Sean Paul <> Link:
2019-06-28Merge tag 'drm-msm-next-2019-06-25' of ↵Dave Airlie1-12/+7 into drm-next + usual progress on cleanups + dsi vs EPROBE_DEFER fixes + msm8998 (snapdragon 835 support) + a540 gpu support (mesa support already landed) + dsi, dsi-phy support + mdp5 and dpu interconnect (bus/memory scaling) support + initial prep work for per-context pagetables (at least the parts that don't have external dependencies like iommu/arm-smmu) There is one more patch for fixing DSI cmd mode panels (part of a set of patches to get things working on nexus5), but it would be conflicty with 1cff7440a86e04a613665803b42034 in drm-next without rebasing or back-merge, and since it doesn't conflict with anything in msm-next, I think it best if Sean merges that through drm-mix-fixes instead. (In other news, I've been making some progress w/ getting efifb working properly on sdm850 laptop without horrible hacks, and drm/msm + clk stuff not totally falling over when bootloader enables display and things are already running when driver probes.. but not quite ready yet, hopefully we can post some of that for 5.4.. should help for both the sdm835 and sdm850 laptops.) Signed-off-by: Dave Airlie <> From: Rob Clark <> Link:
2019-06-20drm/msm/dsi: Move setup_encoder to modeset_initSean Paul1-2/+0
Now that the panel probe/setup is in the modeset path, we can call dsi_manager_setup_encoder() in a common place for both internal and external bridge setups. Reviewed-by: Rob Clark <> Signed-off-by: Sean Paul <> Link:
2019-06-20drm/msm/dsi: Use the new setup_encoder function in attach_dsi_deviceSean Paul1-1/+1
Now that we have a function to call set_encoder_mode() for us, use it. Reviewed-by: Rob Clark <> Signed-off-by: Sean Paul <> Link:
2019-06-20drm/msm/dsi: Split mode_flags out of msm_dsi_host_get_panel()Sean Paul1-9/+6
We use the flags in more places than just get_panel, so split them out into a separate function. Reviewed-by: Rob Clark <> Signed-off-by: Sean Paul <> Link:
2019-06-18drm/msm: check for equals 0 onlyNicholas Mc Guire1-1/+1
wait_for_completion_timeout() returns 0 on timeout and aleast 1 otherwise so checking for < makes no sense here. Signed-off-by: Nicholas Mc Guire <> Reviewed-by: Abhinav Kumar <> Signed-off-by: Rob Clark <>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner1-9/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 and only version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 294 file(s). Signed-off-by: Thomas Gleixner <> Reviewed-by: Allison Randal <> Reviewed-by: Alexios Zavras <> Cc: Link: Signed-off-by: Greg Kroah-Hartman <>
2019-01-14drm: bridge: Constify mode arguments to bridge .mode_set() operationLaurent Pinchart1-1/+1
The mode and ajusted_mode passed to the bridge .mode_set() operation should never be modified by the bridge (and are not in any of the existing bridge drivers). Make them const to make this clear. Signed-off-by: Laurent Pinchart <> Reviewed-by: Daniel Vetter <>
2018-12-11drm/msm: Add a name field for gem objectsJordan Crouse1-0/+2
For debugging purposes it is useful to assign descriptions to buffers so that we know what they are used for. Add a field to the buffer object and use that to name the various kernel side allocations which ends up looking like like this in /d/dri/X/gem: flags id ref offset kaddr size madv name 00040000: I 0 ( 1) 00000000 0000000070b79eca 00004096 memptrs vmas: [gpu: 01000000,mapped,inuse=1] 00020000: I 0 ( 1) 00000000 0000000031ed4074 00032768 ring0 Signed-off-by: Jordan Crouse <> Signed-off-by: Rob Clark <>
2018-12-11drm/msm: Count how many times iova memory is pinnedJordan Crouse1-1/+1
Add a reference count to track how many times a particular chunk of iova memory is pinned (mapped) in the iomu and add msm_gem_unpin_iova to give up references. It is important to note that msm_gem_unpin_iova replaces msm_gem_put_iova because the new implicit behavior that an assigned iova in a given vma is now valid for the life of the buffer and what we are really focusing on is the use of that iova. For now the unmappings are lazy; once the reference counts go to zero they *COULD* be unmapped dynamically but that will require an outside force such as a shrinker or mm_notifiers. For now, we're just focusing on getting the counting right and setting ourselves up to be ready for the future. Signed-off-by: Jordan Crouse <> Signed-off-by: Rob Clark <>
2018-12-11drm/msm: Add msm_gem_get_and_pin_iova()Jordan Crouse1-1/+1
Add a new function to get and pin the iova memory in one step (basically renaming the old msm_gem_get_iova function) and switch msm_gem_get_iova() to only allocate an iova but not map it in the IOMMU. This is only currently used by msm_ioctl_gem_info() since all other users of of the iova expect that the memory be immediately available. Signed-off-by: Jordan Crouse <> Signed-off-by: Rob Clark <>
2018-12-11drm: msm: Use DRM_DEV_* instead of dev_*Mamta Shukla1-11/+11
Use DRM_DEV_INFO/ERROR/WARN instead of dev_info/err/debug to generate drm-formatted specific log messages so that it will be easy to differentiate in case of multiple instances of driver. Signed-off-by: Mamta Shukla <> Signed-off-by: Rob Clark <>
2018-10-03drm/msm: dsi: Return errors whan dt parsing failsSean Paul1-0/+2
If dt parsing fails, we should return an error instead of pretending everything completed successfully. Cc: Doug Anderson <> Reviewed-by: Abhinav Kumar <> Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-07-30drm/msm: dsi: Handle dual-channel for 6G as wellSean Paul1-37/+35
This fixes up a collision between introducing dual-channel support and the dsi refactors. This patch applies the same dual-channel considerations and pclk calculations to both v2 and 6G, with a bit of abstracting for good measure. Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-07-26drm/msm: higher values of pclk can exceed 32 bits when multiplied by a factorAbhinav Kumar1-2/+5
Make the pclk_rate u64 to accommodate higher pixel clock rates. Changes in v3: - Converted pclk_rate to u32 (Archit) - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar <> Cc: Archit Taneja <> Signed-off-by: Abhinav Kumar <> Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-07-26drm/msm/dsi: adjust dsi timing for dual dsi modeChandan Uddaraju1-12/+53
For dual dsi mode, the horizontal timing needs to be divided by half since both the dsi controllers will be driving this panel. Adjust the pixel clock and DSI timing accordingly. Changes in v3: - Added Archit's R-b - Rebase on dsi cleanup set in msm-next Cc: Sibi Sankar <> Reviewed-by: Archit Taneja <> Signed-off-by: Chandan Uddaraju <> Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-07-25drm/msm/dsi: replace version checks with helper functionsSibi Sankar1-212/+29
Replace version checks with the helper functions bound to cfg_handler for DSI v2, DSI 6G 1.x and DSI 6G v2.0+ controllers Signed-off-by: Sibi Sankar <> Signed-off-by: Rob Clark <>
2018-07-25drm/msm/dsi: add implementation for helper functionsSibi Sankar1-2/+216
Add dsi host helper function implementation for DSI v2 DSI 6G 1.x and DSI 6G v2.0+ controllers Signed-off-by: Sibi Sankar <> Signed-off-by: Rob Clark <>
2018-07-10drm/panel: Make of_drm_find_panel() return an ERR_PTR() instead of NULLBoris Brezillon1-1/+1
Right now, the DRM panel logic returns NULL when a panel pointing to the passed OF node is not present in the list of registered panels. Most drivers interpret this NULL value as -EPROBE_DEFER, but we are about to modify the semantic of of_drm_find_panel() and let the framework return -ENODEV when the device node we're pointing to has a status property that is not equal to "okay" or "ok". Let's first patch the of_drm_find_panel() implementation to return ERR_PTR(-EPROBE_DEFER) instead of NULL and patch all callers to replace the '!panel' check by an 'IS_ERR(panel)' one. Signed-off-by: Boris Brezillon <> Signed-off-by: Thierry Reding <> Link:
2018-06-04drm/msm: Fix NULL deref on bind/probe deferralSean Paul1-1/+11
This patch avoids dereferencing msm_host->dev when it is NULL. If we find ourselves tearing down dsi before calling (mdp4|mdp5|dpu)_kms_init(), we'll end up in a state where the dev pointer is NULL and trying to extract priv from it will fail. This was introduced in a seemingly innocuous commit to ensure the arguments to msm_gem_put_iova() are correct (even though that function has been a stub for ~5 years). Correctness FTW! \o/ Fixes: b01884a286b0 drm/msm: use correct aspace pointer in msm_gem_put_iova() Cc: Daniel Mack <> Cc: Rob Clark <> Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-06-03drm/msm: use correct aspace pointer in msm_gem_put_iova()Daniel Mack1-1/+2
Even though msm_gem_put_iova() is currently a NOP function, the caller should pass in the address space pointer it used to obtain the object. Other call sites were changed in 8bdcd949bbe7e ("drm/msm: pass address-space to _get_iova() and friends"), but this one seems to have been forgotten. Signed-off-by: Daniel Mack <> Cc: Rob Clark <> Signed-off-by: Rob Clark <>
2018-06-03drm/msm: remove unbalanced mutex unlockDaniel Mack1-1/+0
This regression stems from 0e08270a1f01 ("drm/msm: Separate locking of buffer resources from struct_mutex"). Signed-off-by: Daniel Mack <> Cc: Sushmita Susheelendra <> Cc: Rob Clark <> Fixes: 0e08270a1f01 ("drm/msm: Separate locking of buffer resources from struct_mutex") Signed-off-by: Rob Clark <>
2018-06-03drm/msm/dsi: use correct enum in dsi_get_cmd_fmtStefan Agner1-1/+1
The function dsi_get_cmd_fmt returns enum dsi_cmd_dst_format, use the correct enum value also for MIPI_DSI_FMT_RGB666/_PACKED. This has been discovered using clang: drivers/gpu/drm/msm/dsi/dsi_host.c:743:35: warning: implicit conversion from enumeration type 'enum dsi_vid_dst_format' to different enumeration type 'enum dsi_cmd_dst_format' [-Wenum-conversion] case MIPI_DSI_FMT_RGB666: return VID_DST_FORMAT_RGB666; ~~~~~~ ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Stefan Agner <> Reviewed-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2018-06-03drm/msm/dsi: check video mode engine status before waitingAbhinav Kumar1-2/+4
Make sure the video mode engine is on before waiting for the video done interrupt. Changes in v4: - Move setting enabled to false earlier Changes in v3: - Move the return value check to another patch Changes in v2: - Replace pr_err with dev_err - Changed error message Signed-off-by: Abhinav Kumar <> Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-06-03drm/msm/dsi: check return value for video done waitsAbhinav Kumar1-1/+7
Check for the return value of wait for video done waits and print appropriate error message. Signed-off-by: Abhinav Kumar <> Signed-off-by: Sean Paul <> Signed-off-by: Rob Clark <>
2018-03-19drm/msm/dsi: fix direct caller of msm_gem_free_object()Rob Clark1-3/+1
This should be using drm_gem_object_put(). Also since this is done only in driver unload path, we don't need to synchronize setting tx_gem_obj to NULL, so juse use the _unlocked() variant. Signed-off-by: Rob Clark <>
2018-02-20drm/msm/dsi: Get byte_intf_clk only for versions that need itArchit Taneja1-5/+10
Newer DSI host controllers (SDM845 in particular) require a new clock called byte_intf_clk. A recent patch tried to add this as an optional clock, but it still set 'ret' to an error number if it didn't find it. This breaks the host's probe for all previous DSI host versions. Instead of setting this up as an optional clock, try to get the clock only for the DSI version that supports it. Fixes: 56558fb ("drm/msm/dsi: Add byte_intf_clk") Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2018-02-20drm/msm/dsi: Add byte_intf_clkArchit Taneja1-0/+32
DSI6G v2.0+ blocks have a new clock input to them called byte_intf_clk. It's rate is to be set as byte_clk / 2. Within the clock controller (CC) subsystem, this clock is a child/descendant of the byte_clk. Set it up as an optional clock in the DSI host driver. Make sure that we enable/set its rate only after we configure byte_clk. This is required for the ancestor clocks in the CC to be configured correctly. Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2018-02-20drm/msm/dsi: Use msm_clk_get in dsi_get_configArchit Taneja1-4/+2
We try to get the interface clock in dsi_get_config early during DSI's component bind. Try getting both the "iface" and "iface_clk" clock name variants so that we are compatible with both new and legacy DT. Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-11-02Backmerge tag 'v4.14-rc7' into drm-nextDave Airlie1-1/+1
Linux 4.14-rc7 Requested by Ben Skeggs for nouveau to avoid major conflicts, and things were getting a bit conflicty already, esp around amdgpu reverts.
2017-10-28drm/msm/dsi: convert to msm_clk_get()Rob Clark1-15/+15
We already have, as a result of upstreaming the gpu bindings, msm_clk_get() which will try to get the clock both without and with a "_clk" suffix. Use this in DSI code so we can drop the "_clk" suffix in bindings while maintaing backwards compatibility. Signed-off-by: Rob Clark <> Reviewed-by: Sean Paul <>
2017-10-12drm/msm/dsi: Use correct pm_runtime_put variant during host_initArchit Taneja1-1/+1
The DSI runtime PM suspend/resume callbacks check whether msm_host->cfg_hnd is non-NULL before trying to enable the bus clocks. This is done to accommodate early calls to these functions that may happen before the bus clocks are even initialized. Calling pm_runtime_put_autosuspend() in dsi_host_init() can result in racy behaviour since msm_host->cfg_hnd is set very soon after. If the suspend callback happens too late, we end up trying to disable clocks that were never enabled, resulting in a bunch of WARN_ON splats. Use pm_runtime_put_sync() so that the suspend callback is called immediately. Reported-by: Nicolas Dechesne <> Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-08-02drm/msm/dsi: Implement RPM suspend/resume callbacksArchit Taneja1-41/+42
The bus clocks are always enabled/disabled along with the power domain, so move it to the runtime suspend/resume ops. This cleans up the clock code a bit. Get rid of the clk_mutex mutex since it isn't needed. Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-08-02drm/msm/dsi: Set up runtime PM for DSIArchit Taneja1-0/+11
Call the pm_runtime_get/put API where we need the clocks enabled. The main entry/exit points are 1) enabling/disabling the DSI bridge and 2) Sending commands from the DSI host to the device. Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-08-01drm/msm/dsi: Calculate link clock rates with updated dsi->lanesArchit Taneja1-7/+7
After the commit mentioned below, we start computing the byte and pixel clocks (dsi_calc_clk_rate) in the DSI bridge's mode_set() op. The calculation involves the number of DSI lanes being used by the downstream bridge/panel. If the downstream bridge/panel tries to change the number of DSI lanes (as done in the ADV7533 driver) in its mode_set() op, then our DSI host driver will not have the correct number of lanes when computing byte/pixel clocks. Fix this by delaying the clock rate calculation in the DSI bridge enable path. In particular, compute the clock rates in msm_dsi_host_get_phy_clk_req(). This fixes the DSI host error interrupts seen when we try to switch between modes that require different number of lanes (4 to 3 lanes, or vice versa) on db410c. The error interrupts occur since the byte/pixel clock rates aren't according to what the DSI video mode timing engine expects. Fixes: b62aa70a98c5 ("drm/msm/dsi: Move PHY operations out of host") Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-06-17drm/msm: Separate locking of buffer resources from struct_mutexSushmita Susheelendra1-3/+1
Buffer object specific resources like pages, domains, sg list need not be protected with struct_mutex. They can be protected with a buffer object level lock. This simplifies locking and makes it easier to avoid potential recursive locking scenarios for SVM involving mmap_sem and struct_mutex. This also removes unnecessary serialization when creating buffer objects, and also between buffer object creation and GPU command submission. Signed-off-by: Sushmita Susheelendra <> [robclark: squash in handling new locking for shrinker] Signed-off-by: Rob Clark <>
2017-06-16drm/msm: pass address-space to _get_iova() and friendsRob Clark1-2/+2
No functional change, that will come later. But this will make it easier to deal with dynamically created address spaces (ie. per- process pagetables for gpu). Signed-off-by: Rob Clark <>
2017-06-16drm/msm/mdp4+5: move aspace/id to base classRob Clark1-2/+8
Before we can shift to passing the address-space object to _get_iova(), we need to fix a few places (dsi+fbdev) that were hard-coding the adress space id. That gets somewhat easier if we just move these to the kms base class. Prep work for next patch. Signed-off-by: Rob Clark <>
2017-04-06drm: convert drivers to use of_graph_get_remote_nodeRob Herring1-1/+1
Convert drivers to use the new of_graph_get_remote_node() helper instead of parsing the endpoint node and then getting the remote device node. Now drivers can just specify the device node and which port/endpoint and get back the connected remote device node. The details of the graph binding are nicely abstracted into the core OF graph code. This changes some error messages to debug messages (in the graph core). Graph connections are often "no connects" depending on the particular board, so we want to avoid spurious messages. Plus the kernel is not a DT validator. Signed-off-by: Rob Herring <> Acked-by: Neil Armstrong <> Tested-by: Liviu Dudau <> Tested-by: Eric Anholt <> Tested-by: Jyri Sarha <> Tested by: Archit Taneja <> Signed-off-by: Sean Paul <>
2017-02-26Merge airlied/drm-next into drm-misc-nextDaniel Vetter1-48/+49
Backmerge the main pull request to sync up with all the newly landed drivers. Otherwise we'll have chaos even before 4.12 started in earnest. Signed-off-by: Daniel Vetter <>
2017-02-14drm/msm/dsi: fix error return code in msm_dsi_host_init()Wei Yongjun1-0/+1
Fix to return error code -ENOMEM from the malloc error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <> Signed-off-by: Daniel Vetter <> Link:
2017-02-06drm/msm/dsi: Move PHY operations out of hostHai Li1-27/+19
Since DSI PHY has been a separate platform device, it should not depend on the resources in host to be functional. This change is to trigger PHY operations in manager, instead of host, so that host and PHY can be completely separated. Signed-off-by: Hai Li <> Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-02-06drm/msm/dsi: Reset both PHYs before clock operation for dual DSIArchit Taneja1-12/+13
In case of dual DSI, some registers in PHY1 have been programmed during PLL0 clock's set_rate. The PHY1 reset called by host1 later will silently reset those PHY1 registers. This change is to reset and enable both PHYs before any PLL clock operation. [Originally worked on by Hai Li <>. Fixed up by Archit Taneja <>] Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-02-06drm/msm/dsi: Return more timings from PHY to hostHai Li1-7/+13
The DSI host is required to configure more timings calculated in PHY. By introducing a shared structure, this change allows more timing information passed from PHY to host. Signed-off-by: Hai Li <> Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-02-06drm/msm/dsi: Don't error if a DSI host doesn't have a device connectedArchit Taneja1-5/+5
The driver returns an error if a DSI DT node is populated, but no device is connected to it or if the data-lane map isn't present. Ideally, such a DSI node shouldn't be probed at all (i.e, its status should be set to "disabled in DT"), but there isn't any harm in registering the DSI device even if it doesn't have a bridge/panel connected to it. Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2017-02-06drm/msm: Set encoder's mode of operation using a kms funcArchit Taneja1-0/+2
The mdp5 kms driver currently sets up multiple encoders per interface (INTF), one for each kind of mode of operation it supports. We create 2 drm_encoders for DSI, one for Video Mode and the other for Command Mode operation. The reason behind this approach could have been that we aren't aware of the DSI device's mode of operation when we create the encoders. This makes things a bit complicated, since these encoders have to be further attached to the same DSI bridge. The easier way out is to create a single encoder, and make the DSI driver set its mode of operation when we know what the DSI device's mode flags are. Start with providing a way to set the mdp5_intf_mode using a kms func that sets the encoder's mode of operation. When constructing a DSI encoder, we set the mode of operation to Video Mode as default. When the DSI device is attached to the host, we probe the DSI mode flags and set the corresponding mode of operation. Signed-off-by: Archit Taneja <> Signed-off-by: Rob Clark <>
2016-12-01Merge branch 'msm-next' of git:// into ↵Dave Airlie1-2/+2
drm-next On the userspace side, all the basics are working, and most of glmark2 is working. I've been working through deqp, and I've got a couple more things to fix (but we've gone from 70% to 80+% pass in last day, and current deqp run that is going should pick up another 5-10%). I expect to push the mesa patches today or tomorrow. There are a couple more a5xx related patches to take the gpu out of secure mode (for the devices that come up in secure mode, like the hw I have), but those depend on an scm patch that would come in through another tree. If that can land in the next day or two, there might be a second late pull request for drm/msm. In addition to the new-shiny, there have also been a lot of overlay/ plane related fixes for issues found using drm-hwc2 (in the process of testing/debugging the atomic/kms fence patches), resulting in rework to assign hwpipes to kms planes dynamically (as part of global atomic state) and also handling SMP (fifo) block allocation atomically as part of the ->atomic_check() step. All those patches should also help out atomic weston (when those patches eventually land). * 'msm-next' of git:// (36 commits) drm/msm: gpu: Add support for the GPMU drm/msm: gpu: Add A5XX target support drm/msm: Disable interrupts during init drm/msm: Remove 'src_clk' from adreno configuration drm/msm: gpu: Add OUT_TYPE4 and OUT_TYPE7 drm/msm: Add adreno_gpu_write64() drm/msm: gpu Add new gpu register read/write functions drm/msm: gpu: Return error on hw_init failure drm/msm: gpu: Cut down the list of "generic" registers to the ones we use drm/msm: update generated headers drm/msm/adreno: move scratch register dumping to per-gen code drm/msm/rd: support for 64b iova drm/msm: convert iova to 64b drm/msm: set dma_mask properly drm/msm: Remove bad calls to of_node_put() drm/msm/mdp5: move LM bounds check into plane->atomic_check() drm/msm/mdp5: dump smp state on errors too drm/msm/mdp5: add debugfs to show smp block status drm/msm/mdp5: handle SMP block allocations "atomically" drm/msm/mdp5: dynamically assign hw pipes to planes ...
2016-11-28drm/msm: convert iova to 64bRob Clark1-2/+2
For a5xx the gpu is 64b so we need to change iova to 64b everywhere. On the display side, iova is still 32b so it can ignore the upper bits. (Although all the armv8 devices have an iommu that can map 64b pa to 32b iova.) Signed-off-by: Rob Clark <>