index
:
drm/drm
drm-fixes
drm-next
drm-next-5.3-backmerge-conflicts
DRM kernel graphics driver development tree
UNKNOWN
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
gpu
/
drm
/
i915
/
intel_cdclk.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-04-17
drm/i915/ehl: inherit icl cdclk init/uninit
Jani Nikula
1
-2
/
+2
2019-04-08
drm/i915/cdclk: have only one init/uninit function
Jani Nikula
1
-72
/
+48
2019-04-08
drm/i915: extract intel_cdclk.h from intel_drv.h
Jani Nikula
1
-0
/
+1
2019-04-04
drm/i915: Fixup kerneldoc for intel_cdclk_needs_cd2x_update
Chris Wilson
1
-0
/
+1
2019-04-03
drm/i915: Skip modeset for cdclk changes if possible
Ville Syrjälä
1
-28
/
+107
2019-04-03
drm/i915: Save the old CDCLK atomic state
Imre Deak
1
-0
/
+20
2019-04-03
drm/i915: Force 2*96 MHz cdclk on glk/cnl when audio power is enabled
Ville Syrjälä
1
-20
/
+10
2019-03-26
drm/i915: switch intel_wait_for_register to uncore
Daniele Ceraolo Spurio
1
-6
/
+6
2019-03-20
drm/i915: Use HPLLVCO_MOBILE for all PNVs
Ville Syrjälä
1
-1
/
+2
2019-03-14
drm/i915: Also use new comparative stuff for more ICP+ stuff
Rodrigo Vivi
1
-1
/
+1
2019-03-13
drm/i915: Start using comparative INTEL_PCH_TYPE
Rodrigo Vivi
1
-1
/
+1
2019-03-13
drm/i915/gen11+: First assume next platforms will inherit stuff
Rodrigo Vivi
1
-3
/
+3
2019-03-04
drm/i915: Yet another if/else sort of newer to older platforms.
Rodrigo Vivi
1
-19
/
+19
2019-02-13
drm/i915: s/PUNIT_REG_DSPFREQ/PUNIT_REG_DSPSSPM/
Ville Syrjälä
1
-7
/
+7
2019-01-17
drm/i915/cdclk: switch to kernel types
Jani Nikula
1
-20
/
+20
2019-01-14
drm/i915: Markup paired operations on display power domains
Chris Wilson
1
-4
/
+6
2018-12-12
drm/i915: replace IS_GEN<N> with IS_GEN(..., N)
Lucas De Marchi
1
-5
/
+5
2018-11-13
drm/i915: add ICP support to cnp_rawclk() and kill icp_rawclk()
Paulo Zanoni
1
-29
/
+8
2018-11-13
drm/i915: rename CNP_RAWCLK_FRAC to CNP_RAWCLK_DEN
Paulo Zanoni
1
-3
/
+3
2018-11-13
drm/i915/cnp+: update to the new RAWCLK_FREQ recommendations
Paulo Zanoni
1
-3
/
+3
2018-10-29
drm/i915/glk: Remove 99% limitation.
Rodrigo Vivi
1
-16
/
+2
2018-07-05
drm/i915: Mark expected switch fall-throughs
Gustavo A. R. Silva
1
-0
/
+5
2018-06-15
drm/i915/icl: implement DVFS for ICL
Paulo Zanoni
1
-3
/
+43
2018-06-11
drm/i915/skl: Add warn about unsupported CDCLK rates
Imre Deak
1
-0
/
+10
2018-05-03
drm/i915: Adjust eDP's logical vco in a reliable place.
Rodrigo Vivi
1
-4
/
+37
2018-04-23
drm/i915/audio: set minimum CD clock to twice the BCLK
Abhay Kumar
1
-2
/
+14
2018-04-05
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jik...
Linus Torvalds
1
-2
/
+2
2018-03-27
treewide: Fix typos in printk
Masanari Iida
1
-2
/
+2
2018-02-14
drm/i915/vlv: Add cdclk workaround for DSI
Hans de Goede
1
-0
/
+8
2018-02-13
drm/i915/icl: add the main CDCLK functions
Paulo Zanoni
1
-2
/
+235
2018-02-09
drm/i915: Use INTEL_GEN everywhere
Tvrtko Ursulin
1
-1
/
+1
2018-02-06
drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing
Imre Deak
1
-5
/
+17
2018-02-01
drm/i915/bxt, glk: Avoid long atomic poll during CDCLK change
Imre Deak
1
-2
/
+2
2018-02-01
drm/i915/bxt, glk: Increase PCODE timeouts during CDCLK freq changing
Imre Deak
1
-5
/
+17
2018-01-19
drm/i915/icp: Get/set proper Raw clock frequency on ICP
Anusha Srivatsa
1
-2
/
+27
2018-01-18
drm/i915: Add tracking for CDCLK bypass frequency
Imre Deak
1
-17
/
+18
2018-01-18
BackMerge tag 'v4.15-rc8' into drm-next
Dave Airlie
1
-9
/
+26
2018-01-04
drm/i915: Apply Display WA #1183 on skl, kbl, and cfl
Lucas De Marchi
1
-9
/
+26
2017-12-23
drm/i915/vlv: Add cdclk workaround for DSI
Hans de Goede
1
-0
/
+8
2017-12-22
drm/i915: Apply Display WA #1183 on skl, kbl, and cfl
Lucas De Marchi
1
-9
/
+26
2017-11-30
drm/i915: Make ips_enabled a property depending on whether IPS is enabled, v3.
Maarten Lankhorst
1
-1
/
+1
2017-10-25
drm/i915/cnl: Allow 2 pixel per clock on Cannonlake.
Rodrigo Vivi
1
-12
/
+2
2017-10-25
drm/i915: Perform a central cdclk state sanity check
Ville Syrjälä
1
-11
/
+19
2017-10-25
drm/i915: Sanity check cdclk in vlv_set_cdclk()
Ville Syrjälä
1
-0
/
+12
2017-10-25
drm/i915: Adjust system agent voltage on CNL if required by DDI ports
Ville Syrjälä
1
-1
/
+45
2017-10-25
drm/i915: Use cdclk_state->voltage on CNL
Ville Syrjälä
1
-16
/
+31
2017-10-25
drm/i915: Use cdclk_state->voltage on BXT/GLK
Ville Syrjälä
1
-2
/
+21
2017-10-25
drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
Ville Syrjälä
1
-7
/
+36
2017-10-25
drm/i915: Use cdclk_state->voltage on BDW
Ville Syrjälä
1
-6
/
+29
2017-10-25
drm/i915: Use cdclk_state->voltage on VLV/CHV
Ville Syrjälä
1
-16
/
+38
[next]