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path: root/drivers/gpu/drm/amd/display/dc
AgeCommit message (Expand)AuthorFilesLines
2020-11-04drm/amdgpu/display: FP fixes for DCN3.x (v4)Alex Deucher5-7/+104
2020-11-04drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher66-480/+71
2020-11-04drm/amd/display: fix psr panel lightupRoman Li1-1/+1
2020-11-02drm/amd: fix typoesBernard Zhao1-1/+1
2020-11-02drm/amd/display: fix the NULL pointer that missed set_disp_pattern_generator ...Huang Rui1-0/+1
2020-11-02drm/amd/display: Tune min clk values for MPO for RVPratik Vishwakarma1-3/+27
2020-11-02drm/amd/display: fix recout calculation for left side clipDmytro Laktyushkin1-0/+4
2020-11-02drm/amd/display: 3.2.110Aric Cyr1-1/+1
2020-11-02drm/amd/display: Add missing pflip irqBhawanpreet Lakha1-2/+2
2020-11-02drm/amd/display: Revert HUBP blank behaviour for nowJoshua Aberback2-26/+3
2020-11-02drm/amd/display: WA to ensure MUX chip gets SUPPORTED_LINK_RATES of eDPDale Zhao1-0/+10
2020-11-02drm/amd/display: Calculate CRC on specific frame regionWayne Lin2-2/+14
2020-11-02drm/amd/display: Blank HUBP during pixel data blank for DCN30 v2Joshua Aberback9-108/+100
2020-11-02drm/amd/display: Reset flip_immediate to topmost planeAlvin Lee1-0/+3
2020-11-02drm/amd/display: correct eDP T9 delayHugo Hu3-13/+17
2020-11-02drm/amd/display: Add OPTC memory low power supportJacky Liao4-10/+32
2020-11-02drm/amd/display: Update panel registerChris Park1-1/+1
2020-11-02drm/amd/display: fail instead of div by zero/bugcheckAshley Thomas3-0/+7
2020-11-02drm/amd/display: 3.2.109Aric Cyr1-1/+1
2020-11-02drm/amd/display: Blank HUBP during pixel data blank for DCN30Joshua Aberback4-2/+87
2020-11-02drm/amd/display: stop top_mgr when type change to non-MST during s3Lewis Huang1-0/+8
2020-11-02drm/amd/display: Keep GSL for full updates with planes that flip VSYNCAlvin Lee1-0/+19
2020-11-02drm/amd/display: Force prefetch mode to 0Isabel Zhang1-1/+3
2020-11-02drm/amd/display: only check available pipe to disable vbios mode.Yongqiang Sun1-1/+5
2020-11-02drm/amd/display: Add MPC memory shutdown support for DCN3Jacky Liao3-3/+63
2020-11-02drm/amd/display: Fix compilation errorTao.Huang3-6/+6
2020-10-30drm/amdgpu: fix incorrect enum typeArnd Bergmann1-2/+2
2020-10-30drm/amd/display: remove unneeded semicolonTom Rix1-1/+1
2020-10-30drm/amd/display: remove useless if/elseZou Wei1-7/+4
2020-10-30drm/amdgpu/display: remove dal_cmd_tbl_helper_dcn2_get_table2Alex Deucher2-43/+0
2020-10-30drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINEAlex Deucher2-4/+0
2020-10-30drm/amd/display: allow 18 bit dp output on DCN3Dmytro Laktyushkin2-15/+1
2020-10-30drm/amdgpu/display: fix indentation in defer_delay_converter_wa()Alex Deucher1-7/+7
2020-10-27drm/amdgpu/display: re-add surface size calculation in dcn30_hwseq.cAlex Deucher1-0/+15
2020-10-27drm/amd/display: correct asic type check V2Evan Quan5-7/+16
2020-10-26drm/amd/display: Clean up debug macrosTakashi Iwai1-21/+12
2020-10-26drm/amd/display: Don't invoke kgdb_breakpoint() unconditionallyTakashi Iwai1-1/+1
2020-10-26drm/amd/display: Fix kernel panic by dal_gpio_open() errorTakashi Iwai1-2/+2
2020-10-26drm/amdgpu/display: use kvzalloc again in dc_create_stateAlex Deucher1-2/+2
2020-10-26drm/amd/display: Using udelay for specific dongle while edid return deferjinlong zhang2-1/+10
2020-10-26drm/amd/display: Removed unreferenced variables.George Shen2-3/+1
2020-10-26drm/amd/display: prevent null pointer accessDmytro Laktyushkin1-5/+7
2020-10-26drm/amd/display: Add tracepoint for capturing clocks stateRodrigo Siqueira2-1/+18
2020-10-26drm/amd/display: Add pipe_state tracepointRodrigo Siqueira3-3/+43
2020-10-26drm/amd/display: Decouple amdgpu_dm_trace from serviceRodrigo Siqueira2-58/+10
2020-10-26drm/amd/display: 3.2.108Aric Cyr1-1/+1
2020-10-26drm/amd/display: adding ddc_gpio_vga_reg_list to ddc reg def'nsMartin Leung1-0/+12
2020-10-26drm/amd/display: Don't trigger flip twice when ODM combine in useAric Cyr1-3/+2
2020-10-26drm/amd/display: Update GSL state if leaving immediate flipAlvin Lee9-135/+1
2020-10-26drm/amd/display: disable seamless boot for VSC_SDPYu-Ting Shen1-0/+4
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