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path: root/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
AgeCommit message (Expand)AuthorFilesLines
2020-11-02drm/amdgpu/vcn: use "*" adjacent to data nameDeepak R Varma1-1/+1
2020-11-02drm/amdgpu/vcn: improve code indentation and alignmentDeepak R Varma1-5/+5
2020-09-17drm/amdgpu: use the AV1 defines for VCN 3.0Alex Deucher1-8/+8
2020-08-14drm/amdgpu/vcn3.0: only SIENNA_CICHLID need specify instance for dec/encJames Zhu1-2/+2
2020-07-27Revert "drm/amdgpu/vcn3.0: remove extra asic type check"James Zhu1-13/+16
2020-07-27drm/amdgpu: update dec ring test for VCN 3.0Boyuan Zhang1-1/+1
2020-07-27drm/amdgpu/vcn3.0: remove extra asic type checkJames Zhu1-16/+13
2020-07-15drm/amd/sriov skip vcn powergating and dec_ring_testJack Zhang1-5/+16
2020-07-15drm/amd/sriov porting sriov cap to vcn3.0Jack Zhang1-32/+318
2020-07-01drm/amdgpu: fix unused variableJames Zhu1-23/+18
2020-07-01drm/amdgpu/vcn3.0: schedule instance 0 for decode and 1 for encodeAlex Deucher1-0/+4
2020-07-01drm/amdgpu: enable DPG mode for VCN3.0Boyuan Zhang1-2/+5
2020-07-01drm/amdgpu: add workaround for issue in DPG for VCN3.0Boyuan Zhang1-0/+4
2020-07-01drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0Boyuan Zhang1-44/+44
2020-07-01drm/amdgpu: add pause DPG mode for VCN3.0Boyuan Zhang1-0/+66
2020-07-01drm/amdgpu: add stop DPG mode for VCN3.0Boyuan Zhang1-0/+34
2020-07-01drm/amdgpu: add start DPG mode for VCN3.0Boyuan Zhang1-0/+141
2020-07-01drm/amdgpu: add mc resume DPG mode for VCN3.0Boyuan Zhang1-0/+89
2020-07-01drm/amdgpu: add clock gating DPG mode for VCN3.0Boyuan Zhang1-0/+48
2020-07-01drm/amdgpu: fix typo for vcn3/jpeg3 idle checkJames Zhu1-1/+1
2020-07-01drm/amdgpu: set the LMI ctrl and reset earlierLeo Liu1-9/+9
2020-07-01drm/amdgpu: fix the PSP front door loading VCN firmwareLeo Liu1-2/+2
2020-07-01drm/amdgpu: change the offset for VCN FW cache windowLeo Liu1-3/+0
2020-07-01drm/amdgpu: add Sienna_Cichlid VCN PG and CG support (v2)Leo Liu1-0/+332
2020-07-01drm/amdgpu: add VCN3.0 support for Sienna_CichlidLeo Liu1-0/+971
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