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path: root/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
AgeCommit message (Expand)AuthorFilesLines
2020-07-15drm/amdgpu: add gmc cg support for navy_flounderJiansong Chen1-2/+4
2020-07-15drm/amdgpu: add gmc ip block for navy_flounderJiansong Chen1-6/+12
2020-07-15drm/amdgpu/gmc10: add navy_flounder supportJiansong Chen1-0/+3
2020-07-08drm/amdgpu: use register distance member instead of hardcode in GMC10Huang Rui1-17/+26
2020-07-02drm/amdgpu: Clean up KFD VMID assignmentFelix Kuehling1-4/+1
2020-07-01drm/amdgpu: add XGMI support for sienna cichlidJohn Clements1-0/+13
2020-07-01drm/amdgpu/sriov : Use kiq to do tlb invalidation for gfx10 on sriovshaoyunl1-0/+18
2020-07-01drm/amdgpu: add gmc cg support for sienna_cichlidLikun Gao1-2/+9
2020-06-03drm/amdgpu: add gmc ip block for sienna_cichlidLikun Gao1-13/+36
2020-06-03drm/amdgpu/gmc10: add sienna_cichlid supportLikun Gao1-0/+3
2020-05-21drm/amdgpu: resize VRAM BAR for CPU access on gfx10Alan Swanson1-4/+10
2020-04-28drm/amdgpu: cleanup IB pool handling a bitChristian König1-1/+2
2020-04-24drm/amdgpu/gmc: Use consistent variable on unlocksColin Ian King1-1/+1
2020-04-24drm/amdgpu: protect ring overrunYintian Tao1-1/+7
2020-04-09drm/amdgpu: Print UTCL2 client ID on a gpuvm faultOak Zeng1-0/+3
2020-04-01drm/amdgpu: implement more ib pools (v2)xinhui pan1-1/+1
2020-01-27drm/amdgpu: Use the correct flush_type in flush_gpu_tlb_pasidFelix Kuehling1-2/+2
2020-01-27drm/amdgpu: Fix TLB invalidation request when using semaphoreFelix Kuehling1-2/+3
2020-01-22Revert "drm/amdgpu: fix modprobe failure of the secondary GPU when GDDR6 trai...Tianci.Yin1-26/+1
2020-01-22drm/amdgpu: modify packet size for pm4 flush tlbsAlex Sierra1-1/+2
2020-01-16drm/amdgpu: fix modprobe failure of the secondary GPU when GDDR6 training ena...Tianci.Yin1-1/+26
2020-01-16drm/amdgpu: export function to flush TLB via pasidAlex Sierra1-0/+74
2020-01-14drm/amdgpu/gmc10: free stolen memory in late_initAlex Deucher1-0/+2
2020-01-14drm/amdgpu/gmc10: remove dead codeAlex Deucher1-9/+0
2020-01-14drm/amdgpu: catch amdgpu_irq_add_id failureNirmoy Das1-0/+4
2020-01-07drm/amdgpu/gmc10: use common invalidation engine helperAlex Deucher1-15/+4
2019-12-12drm/amdgpu: add invalidate semaphore limit for SRIOV in gmc10changzhu1-8/+21
2019-12-03drm/amdgpu: use CPU to flush vmhub if sched stoppedMonk Liu1-1/+2
2019-11-22drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10changzhu1-0/+57
2019-11-14Merge v5.4-rc7 into drm-nextDave Airlie1-5/+3
2019-11-06drm/amdgpu: add dummy read by engines for some GCVM status registers in gfx10changzhu1-5/+3
2019-10-30drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)Pierre-Eric Pelloux-Prayer1-0/+1
2019-10-25drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)Pelloux-prayer, Pierre-eric1-0/+1
2019-10-07drm/amdgpu: Report vram vendor with sysfs (v3)Ori Messinger1-2/+4
2019-10-03drm/amdgpu/atomfirmware: simplify the interface to get vram infoAlex Deucher1-13/+8
2019-09-16drm/amdgpu/SRIOV: Navi12 SRIOV VF gets GTT baseJiange Zhao1-2/+1
2019-09-16drm/amdgpu: cleanup PTE flag generation v3Christian König1-1/+21
2019-09-16drm/amdgpu: cleanup mtype mappingChristian König1-30/+10
2019-09-13drm/amdgpu: switch to new amdgpu_nbio structureHawking Zhang1-3/+3
2019-08-27drm/amdgpu: add dummy read for some GCVM status registersXiaojie Yuan1-0/+15
2019-08-15drm/amdgpu: Add more page fault info printing for GFX10Yong Zhao1-5/+28
2019-08-15drm/amdgpu: Export function to flush TLB of specific vm hubOak Zeng1-4/+12
2019-08-15drm/amdgpu: simplify and cleanup setting the dma maskChristoph Hellwig1-19/+2
2019-08-02drm/amdgpu/gmc10: set gart size and vm size for navi12Xiaojie Yuan1-1/+4
2019-07-18drm/amdgpu: add new member in amdgpu_device for vmhub counts per asic chipLe Ma1-0/+1
2019-07-18drm/amdgpu: rename AMDGPU_GFXHUB/MMHUB macro with hub numberLe Ma1-15/+15
2019-07-18drm/amdgpu/gmc10: add navi14 supportXiaojie Yuan1-1/+4
2019-07-05drm/amd/powerplay: add baco smu reset function for smu11Kevin Wang1-2/+3
2019-06-25Merge branch 'drm-next' into drm-next-5.3Alex Deucher1-0/+1
2019-06-20drm/amdgpu: add gmc v10 ip block for navi10 (v6)Hawking Zhang1-0/+916
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