summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c23
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 3fcc31d75792..ff36db5edf6c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2012,7 +2012,10 @@ void dcn20_populate_dml_writeback_from_context(
}
int dcn20_populate_dml_pipes_from_context(
- struct dc *dc, struct dc_state *context, display_e2e_pipe_params_st *pipes)
+ struct dc *dc,
+ struct dc_state *context,
+ display_e2e_pipe_params_st *pipes,
+ bool fast_validate)
{
int pipe_cnt, i;
bool synchronized_vblank = true;
@@ -2050,6 +2053,7 @@ int dcn20_populate_dml_pipes_from_context(
v_total = timing->v_total;
front_porch = timing->v_front_porch;
+
/* todo:
pipes[pipe_cnt].pipe.src.dynamic_metadata_enable = 0;
pipes[pipe_cnt].pipe.src.dcc = 0;
@@ -2827,7 +2831,8 @@ bool dcn20_fast_validate_bw(
display_e2e_pipe_params_st *pipes,
int *pipe_cnt_out,
int *pipe_split_from,
- int *vlevel_out)
+ int *vlevel_out,
+ bool fast_validate)
{
bool out = false;
int split[MAX_PIPES] = { 0 };
@@ -2839,7 +2844,7 @@ bool dcn20_fast_validate_bw(
dcn20_merge_pipes_for_validate(dc, context);
- pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes);
+ pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
*pipe_cnt_out = pipe_cnt;
@@ -2943,7 +2948,8 @@ static void dcn20_calculate_wm(
display_e2e_pipe_params_st *pipes,
int *out_pipe_cnt,
int *pipe_split_from,
- int vlevel)
+ int vlevel,
+ bool fast_validate)
{
int pipe_cnt, i, pipe_idx;
@@ -2988,10 +2994,10 @@ static void dcn20_calculate_wm(
if (pipe_cnt != pipe_idx) {
if (dc->res_pool->funcs->populate_dml_pipes)
pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc,
- context, pipes);
+ context, pipes, fast_validate);
else
pipe_cnt = dcn20_populate_dml_pipes_from_context(dc,
- context, pipes);
+ context, pipes, fast_validate);
}
*out_pipe_cnt = pipe_cnt;
@@ -3136,7 +3142,7 @@ static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *co
BW_VAL_TRACE_COUNT();
- out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel);
+ out = dcn20_fast_validate_bw(dc, context, pipes, &pipe_cnt, pipe_split_from, &vlevel, fast_validate);
if (pipe_cnt == 0)
goto validate_out;
@@ -3151,7 +3157,7 @@ static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *co
goto validate_out;
}
- dcn20_calculate_wm(dc, context, pipes, &pipe_cnt, pipe_split_from, vlevel);
+ dcn20_calculate_wm(dc, context, pipes, &pipe_cnt, pipe_split_from, vlevel, fast_validate);
dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel);
BW_VAL_TRACE_END_WATERMARKS();
@@ -3814,6 +3820,7 @@ static bool dcn20_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 0;
dc->caps.color.dpp.post_csc = 0;
dc->caps.color.dpp.gamma_corr = 0;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 1;
dc->caps.color.dpp.hw_3d_lut = 1;
dc->caps.color.dpp.ogam_ram = 1;