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path: root/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
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Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c')
-rw-r--r--drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c43
1 files changed, 42 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
index c29dc11619f7..ff6db26626ea 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c
@@ -81,6 +81,33 @@ const char *const *amdgpu_dm_crtc_get_crc_sources(struct drm_crtc *crtc,
return pipe_crc_sources;
}
+bool amdgpu_dm_crc_window_is_default(struct dm_crtc_state *dm_crtc_state)
+{
+ bool ret = true;
+
+ if ((dm_crtc_state->crc_window.x_start != 0) ||
+ (dm_crtc_state->crc_window.y_start != 0) ||
+ (dm_crtc_state->crc_window.x_end != 0) ||
+ (dm_crtc_state->crc_window.y_end != 0))
+ ret = false;
+
+ return ret;
+}
+
+bool amdgpu_dm_crc_window_changed(struct dm_crtc_state *dm_new_crtc_state,
+ struct dm_crtc_state *dm_old_crtc_state)
+{
+ bool ret = false;
+
+ if ((dm_new_crtc_state->crc_window.x_start != dm_old_crtc_state->crc_window.x_start) ||
+ (dm_new_crtc_state->crc_window.y_start != dm_old_crtc_state->crc_window.y_start) ||
+ (dm_new_crtc_state->crc_window.x_end != dm_old_crtc_state->crc_window.x_end) ||
+ (dm_new_crtc_state->crc_window.y_end != dm_old_crtc_state->crc_window.y_end))
+ ret = true;
+
+ return ret;
+}
+
int
amdgpu_dm_crtc_verify_crc_source(struct drm_crtc *crtc, const char *src_name,
size_t *values_cnt)
@@ -105,6 +132,7 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc,
struct dc_stream_state *stream_state = dm_crtc_state->stream;
bool enable = amdgpu_dm_is_valid_crc_source(source);
int ret = 0;
+ struct crc_params *crc_window = NULL, tmp_window;
/* Configuration will be deferred to stream enable. */
if (!stream_state)
@@ -114,8 +142,21 @@ int amdgpu_dm_crtc_configure_crc_source(struct drm_crtc *crtc,
/* Enable CRTC CRC generation if necessary. */
if (dm_is_crc_source_crtc(source)) {
+ if (!amdgpu_dm_crc_window_is_default(dm_crtc_state)) {
+ crc_window = &tmp_window;
+
+ tmp_window.windowa_x_start = dm_crtc_state->crc_window.x_start;
+ tmp_window.windowa_y_start = dm_crtc_state->crc_window.y_start;
+ tmp_window.windowa_x_end = dm_crtc_state->crc_window.x_end;
+ tmp_window.windowa_y_end = dm_crtc_state->crc_window.y_end;
+ tmp_window.windowb_x_start = dm_crtc_state->crc_window.x_start;
+ tmp_window.windowb_y_start = dm_crtc_state->crc_window.y_start;
+ tmp_window.windowb_x_end = dm_crtc_state->crc_window.x_end;
+ tmp_window.windowb_y_end = dm_crtc_state->crc_window.y_end;
+ }
+
if (!dc_stream_configure_crc(stream_state->ctx->dc,
- stream_state, NULL, enable, enable)) {
+ stream_state, crc_window, enable, enable)) {
ret = -EINVAL;
goto unlock;
}