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Diffstat (limited to 'arch/arm/boot/dts/dra7xx-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi159
1 files changed, 122 insertions, 37 deletions
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 69562cdbeada..bb52c6f0e90e 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -11,25 +11,25 @@
atl_clkin0_ck: atl_clkin0_ck {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
- clocks = <&atl_clkctrl DRA7_ATL_CLKCTRL 26>;
+ clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
atl_clkin1_ck: atl_clkin1_ck {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
- clocks = <&atl_clkctrl DRA7_ATL_CLKCTRL 26>;
+ clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
atl_clkin2_ck: atl_clkin2_ck {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
- clocks = <&atl_clkctrl DRA7_ATL_CLKCTRL 26>;
+ clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
atl_clkin3_ck: atl_clkin3_ck {
#clock-cells = <0>;
compatible = "ti,dra7-atl-clock";
- clocks = <&atl_clkctrl DRA7_ATL_CLKCTRL 26>;
+ clocks = <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>;
};
hdmi_clkin_ck: hdmi_clkin_ck {
@@ -1526,44 +1526,82 @@
};
&cm_core_aon {
- mpu_cm: mpu_cm@300 {
+ mpu_cm: mpu-cm@300 {
compatible = "ti,omap4-cm";
reg = <0x300 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x300 0x100>;
- mpu_clkctrl: clk@20 {
+ mpu_clkctrl: mpu-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x4>;
#clock-cells = <2>;
};
+
+ };
+
+ dsp1_cm: dsp1-cm@400 {
+ compatible = "ti,omap4-cm";
+ reg = <0x400 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x400 0x100>;
+
+ dsp1_clkctrl: dsp1-clkctrl@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0x4>;
+ #clock-cells = <2>;
+ };
+
};
- ipu_cm: ipu_cm@500 {
+ ipu_cm: ipu-cm@500 {
compatible = "ti,omap4-cm";
reg = <0x500 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x500 0x100>;
- ipu_clkctrl: clk@40 {
+ ipu1_clkctrl: ipu1-clkctrl@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0x4>;
+ #clock-cells = <2>;
+ };
+
+ ipu_clkctrl: ipu-clkctrl@50 {
+ compatible = "ti,clkctrl";
+ reg = <0x50 0x34>;
+ #clock-cells = <2>;
+ };
+
+ };
+
+ dsp2_cm: dsp2-cm@600 {
+ compatible = "ti,omap4-cm";
+ reg = <0x600 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x600 0x100>;
+
+ dsp2_clkctrl: dsp2-clkctrl@20 {
compatible = "ti,clkctrl";
- reg = <0x40 0x44>;
+ reg = <0x20 0x4>;
#clock-cells = <2>;
};
+
};
- rtc_cm: rtc_cm@700 {
+ rtc_cm: rtc-cm@700 {
compatible = "ti,omap4-cm";
reg = <0x700 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x700 0x100>;
- rtc_clkctrl: clk@40 {
+ rtc_clkctrl: rtc-clkctrl@20 {
compatible = "ti,clkctrl";
- reg = <0x40 0x8>;
+ reg = <0x20 0x28>;
#clock-cells = <2>;
};
};
@@ -1571,160 +1609,207 @@
};
&cm_core {
- coreaon_cm: coreaon_cm@600 {
+ coreaon_cm: coreaon-cm@600 {
compatible = "ti,omap4-cm";
reg = <0x600 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x600 0x100>;
- coreaon_clkctrl: clk@20 {
+ coreaon_clkctrl: coreaon-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x1c>;
#clock-cells = <2>;
};
};
- l3main1_cm: l3main1_cm@700 {
+ l3main1_cm: l3main1-cm@700 {
compatible = "ti,omap4-cm";
reg = <0x700 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x700 0x100>;
- l3main1_clkctrl: clk@20 {
+ l3main1_clkctrl: l3main1-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x74>;
#clock-cells = <2>;
};
+
+ };
+
+ ipu2_cm: ipu2-cm@900 {
+ compatible = "ti,omap4-cm";
+ reg = <0x900 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x900 0x100>;
+
+ ipu2_clkctrl: ipu2-clkctrl@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0x4>;
+ #clock-cells = <2>;
+ };
+
};
- dma_cm: dma_cm@a00 {
+ dma_cm: dma-cm@a00 {
compatible = "ti,omap4-cm";
reg = <0xa00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xa00 0x100>;
- dma_clkctrl: clk@20 {
+ dma_clkctrl: dma-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x4>;
#clock-cells = <2>;
};
};
- emif_cm: emif_cm@b00 {
+ emif_cm: emif-cm@b00 {
compatible = "ti,omap4-cm";
reg = <0xb00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xb00 0x100>;
- emif_clkctrl: clk@20 {
+ emif_clkctrl: emif-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x4>;
#clock-cells = <2>;
};
};
- atl_cm: atl_cm@c00 {
+ atl_cm: atl-cm@c00 {
compatible = "ti,omap4-cm";
reg = <0xc00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xc00 0x100>;
- atl_clkctrl: clk@0 {
+ atl_clkctrl: atl-clkctrl@0 {
compatible = "ti,clkctrl";
reg = <0x0 0x4>;
#clock-cells = <2>;
};
};
- l4cfg_cm: l4cfg_cm@d00 {
+ l4cfg_cm: l4cfg-cm@d00 {
compatible = "ti,omap4-cm";
reg = <0xd00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xd00 0x100>;
- l4cfg_clkctrl: clk@20 {
+ l4cfg_clkctrl: l4cfg-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x84>;
#clock-cells = <2>;
};
};
- l3instr_cm: l3instr_cm@e00 {
+ l3instr_cm: l3instr-cm@e00 {
compatible = "ti,omap4-cm";
reg = <0xe00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xe00 0x100>;
- l3instr_clkctrl: clk@20 {
+ l3instr_clkctrl: l3instr-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0xc>;
#clock-cells = <2>;
};
};
- dss_cm: dss_cm@1100 {
+ dss_cm: dss-cm@1100 {
compatible = "ti,omap4-cm";
reg = <0x1100 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1100 0x100>;
- dss_clkctrl: clk@20 {
+ dss_clkctrl: dss-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x14>;
#clock-cells = <2>;
};
};
- l3init_cm: l3init_cm@1300 {
+ l3init_cm: l3init-cm@1300 {
compatible = "ti,omap4-cm";
reg = <0x1300 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1300 0x100>;
- l3init_clkctrl: clk@20 {
+ l3init_clkctrl: l3init-clkctrl@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0x6c>, <0xe0 0x14>;
+ #clock-cells = <2>;
+ };
+
+ pcie_clkctrl: pcie-clkctrl@b0 {
+ compatible = "ti,clkctrl";
+ reg = <0xb0 0xc>;
+ #clock-cells = <2>;
+ };
+
+ gmac_clkctrl: gmac-clkctrl@d0 {
compatible = "ti,clkctrl";
- reg = <0x20 0xd4>;
+ reg = <0xd0 0x4>;
#clock-cells = <2>;
};
+
};
- l4per_cm: l4per_cm@1700 {
+ l4per_cm: l4per-cm@1700 {
compatible = "ti,omap4-cm";
reg = <0x1700 0x300>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1700 0x300>;
- l4per_clkctrl: clk@0 {
+ l4per_clkctrl: l4per-clkctrl@28 {
compatible = "ti,clkctrl";
- reg = <0x0 0x20c>;
+ reg = <0x28 0x64>, <0xa0 0x24>, <0xf0 0x3c>, <0x140 0x1c>, <0x170 0x4>;
#clock-cells = <2>;
- assigned-clocks = <&l4per_clkctrl DRA7_MCASP3_CLKCTRL 24>;
+ assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>;
assigned-clock-parents = <&abe_24m_fclk>;
};
+
+ l4sec_clkctrl: l4sec-clkctrl@1a0 {
+ compatible = "ti,clkctrl";
+ reg = <0x1a0 0x2c>;
+ #clock-cells = <2>;
+ };
+
+ l4per2_clkctrl: l4per2-clkctrl@c {
+ compatible = "ti,clkctrl";
+ reg = <0xc 0x4>, <0x18 0xc>, <0x90 0xc>, <0xc4 0x4>, <0x138 0x4>, <0x160 0xc>, <0x178 0x24>, <0x1d0 0x3c>;
+ #clock-cells = <2>;
+ };
+
+ l4per3_clkctrl: l4per3-clkctrl@14 {
+ compatible = "ti,clkctrl";
+ reg = <0x14 0x4>, <0xc8 0x14>, <0x130 0x4>;
+ #clock-cells = <2>;
+ };
};
};
&prm {
- wkupaon_cm: wkupaon_cm@1800 {
+ wkupaon_cm: wkupaon-cm@1800 {
compatible = "ti,omap4-cm";
reg = <0x1800 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1800 0x100>;
- wkupaon_clkctrl: clk@20 {
+ wkupaon_clkctrl: wkupaon-clkctrl@20 {
compatible = "ti,clkctrl";
reg = <0x20 0x6c>;
#clock-cells = <2>;
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-19 18:42:34 +0000